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EVB7122-915-FM-A Datasheet(PDF) 9 Page - Melexis Microelectronic Systems |
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EVB7122-915-FM-A Datasheet(HTML) 9 Page - Melexis Microelectronic Systems |
9 / 24 page EVB7122 27 to 930MHz Transceiver Evaluation Board Description 39012 07122 02 Page 9 of 24 EVB Description Rev. 005 June/07 3.1.2 A – word Name Bits Description Reference divider ratio in RX operation mode RR [9:0] 4d .. 1023d Operation mode OPMODE [11:10] 00 01 10 11 Standby mode Receive mode Transmit mode Idle mode #default LNA gain 0 1 low LNA gain high LNA gain #default LNAGAIN [12] This selection is valid if bit LNACTR (bit 21 in C-word) is set to internal LNA gain control. not used [13] set to ‘1’ for correct function Output power steps TXPOWER [15:14] 00 01 10 11 P1 P2 P3 P4 #default Set the PA-on condition PACTRL [16] 0 1 PA is switched on if the PLL locks PA is always on in TX mode #default Set the PLL locked state observation mode 0 before lock only #default Locked state condition will be ascertained only one time afterwards the LD signal remains in high state. 1 before and after lock LOCKMODE [17] locked state will be observed permanently Charge Pump output current CPCUR [18] 0 1 260 µA 1300 µA #default Modulation mode 0 1 ASK FSK #default MODSEL [19] This selection is valid if bit MODCTRL (bit 21 in D-word) is set to internal modulation control. Input data polarity 0 normal #default ‘0’ for space at ASK or fmin at FSK, ‘1’ for mark at ASK or fmax at FSK 1 inverse DTAPOL [20] ‘1’ for space at ASK or fmin at FSK, ‘0’ for mark at ASK or fmax at FSK Active blocks in IDLE mode IDLESEL [21] 0 1 only RO active whole PLL active #default |
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