DS2030W 3.3V Single-Piece 256k

Nonvolatile SRAM

6

_____________________________________________________________________

Power-Down/Power-Up Condition

SLEWS WITH

CE,

WE

RST

BACKUP CURRENT

SUPPLIED FROM

LITHIUM BATTERY

(SEE NOTES 1, 7.)

Note 1: RST is an open-drain output and cannot source current. An external pullup resistor should be connected to this pin to real-

ize a logic-high level.

Note 2: These parameters are sampled with a 5pF load and are not 100% tested.

CE or WE going high.

user. Minimum expected data-retention time is based on a maximum of two +230°C convection solder reflow exposures,

meter is assured by component selection, process control, and design. It is not measured directly in production testing.

Note 9: WE is high for a read cycle.

Note 11: If the CE low transition occurs simultaneously with or latter than the WE low transition, the output buffers remain in a high-

impedance state during this period.

Note 12: If the CE high transition occurs prior to or simultaneously with the WE high transition, the output buffers remain in a high-

impedance state during this period.

Note 13: If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remain

in a high-impedance state during this period.

Note 14: DS2030W BGA modules are recognized by Underwriters Laboratory (UL) under file E99151.