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ICS843021AGI-01T Datasheet(PDF) 8 Page - Integrated Device Technology

Part # ICS843021AGI-01T
Description  FEMTOCLOCKS??CRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS843021AGI-01T Datasheet(HTML) 8 Page - Integrated Device Technology

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ICS843021I-01
FEMTOCLOCKS™CRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
IDT™ / ICS™ 3.3V , 2.5V LVPECL CLOCK GENERATOR
8
ICS843021AGI-01 REV. A DECEMBER 3, 2007
Termination for 3.3V LVPECL Outputs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50
transmission lines. Matched impedance techniques should be
used to maximize operating frequency and minimize signal
distortion. Figures 3A and 3B show two different layouts which are
recommended only as guidelines. Other suitable clock layouts may
exist and it would be recommended that the board designers
simulate to guarantee compatibility across all printed circuit and
clock component process variations.
Figure 3A. 3.3V LVPECL Output Termination
Figure 3B. 3.3V LVPECL Output Termination
V
CC - 2V
50
50
RTT
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
RTT =
Z
o
1
((V
OH + VOL) / (VCC – 2)) – 2
3.3V
125
125
84
84
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN


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