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ICS002BI72L Datasheet(PDF) 9 Page - Integrated Device Technology

Part # ICS002BI72L
Description  FEMTOCLOCKS??VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS002BI72L Datasheet(HTML) 9 Page - Integrated Device Technology

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IDT/ ICSWCDMA CLOCK GENERATOR/JITTER ATTENUATOR
9
ICS843002BKI-72 REV. A NOVEMBER 21, 2007
ICS843002I-72
FEMTOCLOCKS™ VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR
TERMINATION FOR 2.5V LVPECL OUTPUT
Figure 3A and Figure 5B show examples of termination for 2.5V
LVPECL driver. These terminations are equivalent to terminating
50
Ω to V
CC
- 2V. For V
CC
= 2.5V, the V
CC
- 2V is very close to ground
level. The R3 in Figure 5B can be eliminated and the termination
is shown in Figure 5C.
FIGURE 3C. 2.5V LVPECL TERMINATION EXAMPLE
FIGURE 3B. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 3A. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
R2
62.5
Zo = 50 Ohm
R1
250
+
-
2.5V
2,5V LVPECL
Driv er
R4
62.5
R3
250
Zo = 50 Ohm
2.5V
VCC=2.5V
R1
50
R3
18
Zo = 50 Ohm
Zo = 50 Ohm
+
-
2,5V LVPECL
Driv er
VCC=2.5V
2.5V
R2
50
2,5V LVPECL
Driv er
VCC=2.5V
R1
50
R2
50
2.5V
Zo = 50 Ohm
Zo = 50 Ohm
+
-
INPUTS:
LVCMOS CONTROL PINS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
Ω resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVPECL OUTPUTS
All unused LVPECL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.


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