10

INDUSTRIALTEMPERATURERANGE

IDT5V9885B

3.3V EEPROMPROGRAMMABLECLOCKGENERATOR

Example

Sincethespreadiscenter,theSS_OFFSETcanbesetto'0'. SolveforthenominalMvalue;keepinmindthatthenominalMshouldbechosentomaximize

the VCO. Start with D = 1, using Eq.10 and Eq.11.

Using Eq.4, we arbitrarily choose N = 20, A = 3. Now that we have the nominal M value, we can determine TSSC and NSSC by using Eq.12.

Nssc * Tssc = 25MHz / (33KHz * 4) = 190

However, using Eq. 7 and Eq.8, we find that the closest value is when TSSC = 14 and NSSC = 6. Keep in mind to maximize the number of samples used

toenhancetheprofileofthespreadspectrumwaveform.

Tssc = 14 + 2 = 16

Nssc = 6 * 2 = 12

Nssc * Tssc = 192

UseEq.14todeterminethevalueofthesigma-delta-encodedsamples.

±2% =

ΣΔ * 100

64 * 44

ΣΔ = 56.32

Eitherroundupordowntothenearestintegervalue. Therefore,weendupwith56or57forsigma-delta-encodedsamples. Sincethesigma-delta-encoded

samples must not exceed 63 with SS_OFFSET set to '0', 56 or 57 is well within the limits. It is the discretion of the user to define the shape of the profile that

isbettersuitedfortheintendedapplication.

Using Eq.14 again, the actual spread for the sigma-delta-encoded samples of 56 and 57 are ±1.99% and ±2.02%, respectively.

Use Eq.10 to determine if the X2 bit needs to be set;

Amplitude = 44 * (1.99 or 2.02) / 100 = 0.44 < 1

2

Therefore, the X2 = '0 '. The dither bit is left to the discretion of the user.

The example above was of a center spread using spread spectrum. For down spread, the nominal M value can be set one integer value lower to 43.

Note that the 5V9885B should not be programmed with TSSC > '0', SS_OFFSET = '0', and SD = '0' in order to prevent an unstable state in the modulator.

ThePLLloopbandwidthmustbeatleast10xthemodulationfrequencyalongwithhigherdamping(larger

ωuz)topreventthespreadspectrumfrombeingfiltered

andreduceextraneousnoise. RefertotheLOOPFILTERsectionformoredetailon

ωuz.TheA[3:0]mustbeusedforspreadspectrum,evenifthetotalmultiplier

value is an even integer.

FRACTIONAL DIVIDER

There is the option for the feedback-divider to be programmed as a fractional divider for only PLL0 and PLL. By setting TSSC > '0' and SD bits to '0', the

SS_OFFSETbitswoulddeterminethefractionaldividevalue.SeetheSPREADSPECTRUMGENERATIONsectionformoredetailsonthe TSSC,SD,and

SS_OFFSET bits. The following equation governs how the fractional divide value is set.

M = 2*N[11:0] + A[3:0] + 1 + SS_OFFSET[5:0] *1/64