ICS932S422C datasheet(10/21 Pages) ICST

Part #	ICS932S422C

Description	PCIe Gen 2 main Clock for Intel-based Servers

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Manufacturer	ICST [Integrated Circuit Systems]

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10

Integrated

Circuit

Systems, Inc.

ICS932S422C

1412A—12/10/07

General SMBus serial interface information for the ICS932S422C

How to Write:

• Controller (host) sends a start bit.

• Controller (host) sends the write address D2

(H)

• ICS clock will

acknowledge

• Controller (host) sends the begining byte location = N

• ICS clock will

acknowledge

• Controller (host) sends the data byte count = X

• ICS clock will

acknowledge

• Controller (host) starts sending

Byte N through

Byte N + X -1

(see Note 2)

• ICS clock will

acknowledge each byte one at a time

• Controller (host) sends a Stop bit

How to Read:

• Controller (host) will send start bit.

• Controller (host) sends the write address D2

(H)

• ICS clock will

acknowledge

• Controller (host) sends the begining byte

location = N

• ICS clock will

acknowledge

• Controller (host) will send a separate start bit.

• Controller (host) sends the read address D3

(H)

• ICS clock will

acknowledge

• ICS clock will send the data byte count = X

• ICS clock sends

Byte N + X -1

• ICS clock sends

Byte 0 through byte X (if X

(H)

was written to byte 8).

• Controller (host) will need to acknowledge each byte

• Controllor (host) will send a not acknowledge bit

• Controller (host) will send a stop bit

ICS (Slave/Receiver)

T

WR

ACK

PstoP bit

Index Block Write Operation

Slave Address D2(H)

Beginning Byte = N

WRite

starT bit

Controller (Host)

Byte N + X - 1

Data Byte Count = X

Beginning Byte N

T

starT bit

WR

WRite

RT

Repeat starT

RD

ReaD

Beginning Byte N

Byte N + X - 1

N

Not acknowledge

PstoP bit

ICS (Slave/Receiver)

Controller (Host)

ACK

Data Byte Count = X

ACK

Slave Address D3(H)

Index Block Read Operation

Slave Address D2(H)

Beginning Byte = N

ACK

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