BATTERY PROTECTION IC FOR 1-CELL PACK

S-8211D Series

Seiko Instruments Inc.

11

Test Circuits

judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to

(1) Overcharge Detection Voltage, Overcharge Release Voltage

(Test Condition 1, Test Circuit 1)

from “H” to “L” when the voltage V1 is gradually increased from the starting condition of V1 = 3.5 V. Overcharge

(2) Overdischarge Detection Voltage, Overdischarge Release Voltage

(Test Condition 2, Test Circuit 2)

from “H” to “L” when the voltage V1 is gradually decreased from the starting condition of V1 = 3.5 V, V2 = 0 V.

(3) Discharge Overcurrent Detection Voltage

(Test Condition 3, Test Circuit 2)

overcurrent delay time when the voltage V2 is increased rapidly (within 10

µs) from the starting condition of V1 = 3.5

V, V2 = 0 V.

(4) Load Short-circuiting Detection Voltage

(Test Condition 3, Test Circuit 2)

delay time when the voltage V2 is increased rapidly (within 10

µs) from the starting condition of V1 = 3.5 V, V2 = 0 V.

(5) Operating Current Consumption

(Test Condition 4, Test Circuit 2)

of V1 = 3.5 V and V2 = 0 V (normal status).

(6) Charger detection voltage (= the detection voltage for irregular charging current)

(Test Condition 4, Test Circuit 2)

≠ 0 only.

The detection voltage for irregular charging current is the voltage between the VM and VSS pin; when gradually