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PESDXV4UG Datasheet(PDF) 9 Page - NXP Semiconductors |
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PESDXV4UG Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 16 page PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 28 January 2008 9 of 16 NXP Semiconductors PESDxV4UF/G/W Very low capacitance quadruple ESD protection diode arrays 7. Application information The devices are designed for the protection of up to four unidirectional data or signal lines from the damage caused by ESD and surge pulses. The devices may be used on lines where the signal polarities are both, positive and negative with respect to ground. The devices provide a surge capability of 16 W per line for an 8/20 µs waveform each. Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The following guidelines are recommended: 1. Place the device as close to the input terminal or connector as possible. 2. The path length between the device and the protected line should be minimized. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops. 6. Minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias. Fig 9. Application diagram 006aab126 data- or transmission lines n.c. unidirectional protection of 4 lines DUT 1 2 3 5 4 bidirectional protection of 3 lines DUT 1 2 3 5 4 |
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