 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TPS40180RGET Datasheet(PDF) 5 Page - Texas Instruments |
|
|
||||||||||||||||||||||||||||||
TPS40180RGET Datasheet(HTML) 5 Page - Texas Instruments |
|
|
5 / 52 page  www.ti.com TPS40180 SLVS753B – FEBRUARY 2007 – REVISED NOVEMBER 2007 ELECTRICAL CHARACTERISTICS (continued) VVDD = 12V, VBP5 = 5V, VPVCC = 5V, –40°C < TJ < 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CURRENT SENSE AMPLIFIER VISOFST Input offset voltage –2.5 0 2.5 mV IIB_CS Input bias current 100 nA GCS Gain at PWM Input 0.2V ≤ VICM ≤ 5.8V 11.25 12.5 13.75 V/V VICM Input common mode range 0 5.8 V VDIFFMX Maximum differential input voltage –60 60 mV DIFFERENTIAL REMOTE VOLTAGE SENSE AMPLIFIER GRVS Gain 0.7 V < V(VOUT) – V(GSNS) < 5.8 V 0.995 1.000 1.005 V/V V(VOUT) – V(GSNS) = 2 V, V(DIFFO) > 1.98 V, 2 V(VDD) – V(VOUT) > 2 V IDIFFOH DIFFO source current mA V(VOUT) – V(GSNS) = 5.8 V, V(DIFFO) > 5.6 V, 1 V(VDD) – V(VOUT) = 1 V IDIFFOL DIFFO sink current V(VOUT) – V(GSNS) = 2 V, V(DIFFO) ≥ 2.02 V 2 mA BWDIFFA Unity gain bandwidth (2) 5 8 MHz Input resistance, inverting DIFFO to GSNS 60 RINDIFFA k Ω Input resistance, noninverting OUT to GND 60 PSEL PIN IISEL Bias current 21.5 23.5 25.5 µA VMNCLK Master mode, no output on CLKIO 0 0 0.5 VM8PH Master mode, 6 phase CLKIO 0.5 0.7 0.9 VM6PH Master mode, 8 phase CLKIO 0.9 VSSTDBY Slave mode, standby state 3.4 Clock slave mode, 8 phase CLKIO, 45 ° VS45 0 0 0.2 phase slot(2) Clock slave mode, 8 phase CLKIO, 90 ° VS90 0.2 0.35 0.5 phase slot(2) Slave mode, 8 phase CLKIO, 135 ° VS135 0.5 0.7 0.9 phase slot(2) Clock slave mode, 8 phase CLKIO, VS180 0.9 1.1 1.3 180 ° phase slot(2) Clock slave mode, 8 phase CLKIO, VS225 1.3 1.6 1.9 225 ° phase slot(2) V Clock slave mode, 8 phase CLKIO, VS270 1.9 2.25 2.6 270 ° phase slot(2) Clock slave mode, 8 phase CLKIO, VS315 2.6 3.0 3.4 315 ° phase slot(2) Clock slave mode, 6 phase CLKIO, VS0 1.9 2.25 2.6 0 phase slot(2) Clock slave mode, 6 phase CLKIO, 60 ° VS60 0 0 0.2 phase slot(2) Clock slave mode, 6 phase CLKIO, VS120 0.2 0.35 0.5 120 ° phase slot(2) Clock slave mode, 6 phase CLKIO, VS180 0.5 0.7 0.9 180 ° phase slot(2) Clock slave mode, 6 phase CLKIO, VS240 0.9 1.1 1.3 240 ° phase slot(2) Clock slave mode, 6 phase CLKIO, VS300 1.3 1.6 1.9 300 ° phase slot(2) (2) Specified by design. Not production tested . Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TPS40180 |
Similar Part No. - TPS40180RGET |
|
Similar Description - TPS40180RGET |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
