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VCA8500 Datasheet(PDF) 7 Page - Texas Instruments |
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VCA8500 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 15 page www.ti.com VCA8500 SBOS390 – JANUARY 2008 Table 1. TERMINAL FUNCTIONS (continued) TERMINAL PIN NO. NAME I/O DESCRIPTION 21 OUT2 O PGA output channel 2 (inverted) 22 OUT2 O PGA output channel 2 23 OUT1 O PGA output channel 1 (inverted) 24 OUT1 O PGA output channel 1 25 OUT5 O PGA output channel 5 (inverted) 26 OUT5 O PGA output channel 5 27 OUT6 O PGA output channel 6 (inverted) 28 OUT6 O PGA output channel 6 29 OUT7 O PGA output channel 7 (inverted) 30 OUT7 O PGA output channel 7 31 OUT8 O PGA output channel 8 (inverted) 32 OUT8 O PGA output channel 8 33 AVDD1 +3.3V analog supply 34 VREFL Clamp level low, 2.0V; bypass with 0.1 µF (min) 35 VREFH Clamp level high, 2.7V; bypass with 0.1 µF (min) 36 VB4 Internal bias voltage; bypass with 0.1 µF (min) 37 VB6 Internal bias voltage; bypass with 0.1 µF (min) 38 VB2 Internal bias voltage; bypass with 0.1 µF (min) 39 AVDD2 +5V analog supply (VCA, CW) 40 IN8 I LNA input channel 8 41 VBL8 Internal bias voltage; bypass with 0.1 µF (min) 42 IN7 I LNA input channel 7 43 VBL7 Internal bias voltage; bypass with 0.1 µF (min) 44 IN6 I LNA input channel 6 45 VBL6 Internal bias voltage; bypass with 0.1 µF (min) 46 AVDD1 +3.3V analog supply 47 IN5 I LNA input channel 5 48 VBL5 Internal bias voltage; bypass with 0.1 µF (min) 49 PD I Power-down pin for fast mode; active high 50 CW0 O CW channel 0 current output 51 CW1 O CW channel 1 current output 52 CW2 O CW channel 2 current output 53 CW3 O CW channel 3 current output 54 CW4 O CW channel 4 current output 55 D_IN I Serial data input 56 CLK I Clock input for serial interface 57 D_OUT O Serial data output 58 RST I Reset input; rising edge resets register to default values. 59 DVDD +3.3V Digital supply; connect to analog supply plane (AVDD1) 60 CW5 CW channel 5 current output 61 CW6 CW channel 6 current output 62 CW7 CW channel 7 current output 63 CW8 CW channel 8 current output 64 CW9 CW channel 9 current output PowerPAD must be connected to the analog ground of the printed circuit board; use this ground for — GND bypass cap return ground. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): VCA8500 |
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