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S25FL016A0LMFI011 Datasheet(PDF) 9 Page - SPANSION |
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S25FL016A0LMFI011 Datasheet(HTML) 9 Page - SPANSION |
9 / 36 page January 7, 2008 S25FL016A_00_C3 S25FL016A 9 Data She e t 3. Input/Output Descriptions 4. Logic Symbol Signal I/O Description SO Output Signal Data Output: Transfers data serially out of the device on the falling edge of SCK. SI Input Serial Data Input: Transfers data serially into the device. Device latches commands, addresses, and program data on SI on the rising edge of SCK. SCK Input Serial Clock: Provides serial interface timing. Latches commands, addresses, and data on SI on rising edge of SCK. Triggers output on SO after the falling edge of SCK. CS# Input Chip Select: Places device in active power mode when driven low. Deselects device and places SO at high impedance when high. After power-up, device requires a falling edge on CS# before any command is written. Device is in standby mode when a program, erase, or Write Status Register operation is not in progress. HOLD# Input Hold: Pauses any serial communication with the device without deselecting it. When driven low, SO is at high impedance, and all input at SI and SCK are ignored. Requires that CS# also be driven low. W# Input Write Protect: Protects the memory area specified by Status Register bits BP2:BP0. When driven low, prevents any program or erase command from altering the data in the protected memory area. VCC Input Supply Voltage GND Input Ground CS# SO W# GND SI SCK HOLD# VCC |
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