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ADS62P45 Datasheet(PDF) 6 Page - Texas Instruments

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Part No. ADS62P45
Description  Dual Channel 14-Bit, 125/105/80/65 MSPS ADC with Parallel CMOS/DDR LVDS outputs
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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 6 page
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ADS62P45, ADS62P44
ADS62P43, ADS62P42
REV1P0 SEP 2007
6
www.ti.com
www.ti.com
PRODUCT PREVIEW information concerns products in
the formative or design phase of development.
Characteristic data and other specifications are design
goals. Texas Instruments reserves the right to change or
discontinue these products without notice.
ELECTRICAL CHARACTERISTICS
Typical values at 25C, min & max values are across the full temperature range TMIN = -40C to TMAX = 85C, AVDD = 3.3V, DRVDD = 1.8V to
3.3V, 50% clock duty cycle, -1dBFS differential analog input, internal reference, applies to CMOS & LVDS interfaces unless otherwise noted.
ADS62P45
125 MSPS
ADS62P44
105 MSPS
ADS62P43
80 MSPS
ADS62P42
65 MSPS
PARAMETER
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
Resolution
14
14
14
14
bits
Analog Input
Differential input voltage range
2.0
2.0
2.0
2.0
V pp
Differential input resistance (at dc),
see Figure 10
1
1
1
1
Differential input capacitance,
see Figure 11
7
7
7
7
pF
Analog input bandwidth
450
450
450
450
MHz
Analog input common mode current
(per input pin of each channel)
165
140
110
91
µA
VCM common mode voltage output
1.5
1.5
1.5
1.5
V
VCM output current capability
4
4
4
4
mA
Power Supply
IAVDD Analog supply current
232
205
172
152
mA
IDRVDD Output buffer supply
current, CMOS interface
2.5MHz input signal,
no load capacitance (1)
15
13
10.5
9
mA
Total power – CMOS interface,
DRVDD = 1.8V
792
TBD
700
TBD
587
TBD
518
TBD
mW
Total power – LVDS interface,
DRVDD = 3.3V
TBD
TBD
TBD
TBD
mW
Global power down
50
TBD
50
TBD
50
TBD
50
TBD
mW
(1) In CMOS mode, the DRVDD current scales with the sampling frequency and the load capacitance on output pins.




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