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ADS62P45 Datasheet(PDF) 46 Page - Texas Instruments |
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ADS62P45 Datasheet(HTML) 46 Page - Texas Instruments |
46 / 67 page ADS62P45, ADS62P44 ADS62P43, ADS62P42 REV1P0 SEP 2007 46 www.ti.com www.ti.com PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. CLOCK INPUT The clock inputs can be driven differentially (SINE, LVPECL or LVDS) or single-ended (LVCMOS), with little or no difference in performance between them. The common-mode voltage of the clock inputs is set to VCM using internal 5 kΩ resistors as shown in Figure 16. This allows using transformer-coupled drive circuits for sine wave clock or ac-coupling for LVPECL, LVDS clock sources (Figure 18 and Figure 19). CLKP 5 kE VCM 5 kE 6 pF 10 E 10 E Lpkg ~ 2 nH Cbond ~ 1 pF Lpkg ~ 2 nH Cbond ~ 1 pF Resr ~ 100 E Resr ~ 100 E CLKM Clock buffer Ceq Ceq Ceq ~ 1 to 3 pF, equivalent input capacitance of clock buffer Figure 16 Internal Clock buffer TBD Figure 17 Clock Input Impedance |
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