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ADS62P45 Datasheet(PDF) 37 Page - Texas Instruments

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Part # ADS62P45
Description  Dual Channel 14-Bit, 125/105/80/65 MSPS ADC with Parallel CMOS/DDR LVDS outputs
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS62P45 Datasheet(HTML) 37 Page - Texas Instruments

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ADS62P45, ADS62P44
ADS62P43, ADS62P42
REV1P0 SEP 2007
37
PRODUCT PREVIEW information concerns products in
the formative or design phase of development.
Characteristic data and other specifications are design
goals. Texas Instruments reserves the right to change or
discontinue these products without notice.
www.ti.com
www.ti.com
PIN ASSIGNMENTS (LVDS INTERFACE)
Pin Name
Description
Pin
Number
Number of pins
AVDD
Analog power supply
AGND
Analog ground
CLKP, CLKM
Differential input clock
INP_A, INM_A
Differential input signal – Channel A
INP_B, INM_B
Differential input signal – Channel B
VCM
Internal reference mode – Common-mode voltage output.
External reference mode – Reference input. The voltage forced on
this pin sets the ADC internal references.
RESET
Serial interface RESET input.
In serial interface mode, the user MUST initialize internal registers through
hardware RESET by applying a high-going pulse on this pin or by using
software reset (refer to Serial Interface section).
In parallel interface mode, the user has to tie RESET pin permanently HIGH.
(SCLK, SDATA and SEN are used as parallel pin controls in this mode)
The pin has an internal 100KΩ pull-down resistor.
SCLK
This pin functions as serial interface clock input when RESET is low.
It functions as analog control pin when RESET is tied high & controls coarse
gain and internal/external reference selection. See Table 4 for details.
This pin has an internal pull-down resistor to ground.
SDATA
This pin functions as serial interface data input when RESET is low.
This pin has an internal pull-down resistor to ground.
SEN
This pin functions as serial interface enable input when RESET is low.
It functions as analog control pin when RESET is tied high & controls the
output interface (LVDS/CMOS) and data format selection. See Table 5 for
details.
This pin has an internal pull-up resistor to AVDD.
CTRL1
CTRL2
CTRL3
These are digital logic input pins. Together they control various power
down and multiplexed mode. See Table 6 for details.
NC
Do not connect


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