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20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373

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Typical Application Circuit

Notes:

1. Set A/B control to 0/+5V, Vdd = +5V and use HCT series logic to provide a TTL driver interface.

2. Control inputs A/B can be driven directly with CMOS logic (HC) with Vdd = +5 Volts applied to the CMOS logic gates.

3. DC blocking capacitors are required for each RF port as shown. Capacitor value determines lowest frequency of operation.

4. Highest RF signal power capability is acheived wiht Vdd = +7V and A/B set to 0/+7V.

5. Back side paddle must be connected to RF ground.

6. A grounded coplanar waveguide PCB layout technique is recommended to achieve high isolation. The component side

ground plane between RFC/grounded paddle and RF1/RF2 should be continuous, see below. There should be a continu-

ous ground plane under component side layout.

v06.0607

SPDT NON-REFLECTIVE

SWITCH, DC - 3.5 GHz