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EUP7966-25DIR1 Datasheet(PDF) 10 Page - Eutech Microelectronics Inc |
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EUP7966-25DIR1 Datasheet(HTML) 10 Page - Eutech Microelectronics Inc |
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10 / 11 page  EUP7966 DS7966 Ver1.0 Aug. 2006 10 Application Note External Capacitors To assure regulator stability, input and output capacitors are required as shown in the Typical Application Circuit. Output Capacitor The EUP7966 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor (temperature characteristics X7R, X5R, Z5U, or Y5V) in 4.7 to 22µF range with 5mΩ to 200mΩ ESR range is suitable in the EUP7966 application circuit. The output capacitor must meet the requirement for minimum amount of capacitance and also have an ESR (Equivalent Series Resistance) value which is within a stable range (5mΩ to 200mΩ) Input Capacitor The input capacitor must be at least 10 µF ceramic, but can be increased without limit. It’s purpose is to provide a low source impedance for the regulator input. Bias Capacitor The 1µF capacitor on the bias line can be any good quality capacitor (ceramic is recommended). Bias Voltage The bias voltage is an external voltage rail required to get gate drive for the N-FET pass transistor. Bias voltage must be in the range of 4.5 – 5.5V to assure proper operation of the part. Shutdown Operation Pulling down the VEN pin will turn-off the regulator. VEN pin must be actively terminated through a pull-up resistor (10 kΩ to 100 kΩ) for a proper operation. If this pin is driven from a source that actively pulls high and low (such as a CMOS rail to rail comparator) , the pull-up resistor is not required. This pin must be tied to VIN if not used. Power Dissipation /Heatsinking A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. Under all possible conditions, the junction temperature must be within the range specified under operating conditions. The total power dissipation of the device is given by: PD=(VIN-VOUT)IOUT+(VIN)IGND where IGND is the operating ground current of the device. The maximum allowable temperature rise (TRmax) depends on the maximum ambient temper -ature (T Amax) of the application, and the maximum allowable junction temperature (TJmax): TRmax=TJmax-TAmax The maximum allowable value for junction to ambient Thermal Resistance, θJA, can be calculated using the formula: θJA=TRmax/PD Heatsinking for the SOP-8 (FD) package is accomplished by allowing heat to flow through the ground slug on the bottom of the package into the copper on the PC board. The heat slug must be soldered down to a copper plane to get good heat transfer. It can also be connected through vias to internal copper planes .Since the heat slug is at ground potential, traces must not be routed under it which are not at ground potential. Under all possible conditions, the junction temperature must be within the range specified under operating conditions. |
Similar Part No. - EUP7966-25DIR1 |
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