X25642IS datasheet(5/16 Pages) ICMIC

Part #	X25642IS

Description	Advanced SPI Serial E2PROM with Block Lock Protection

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Manufacturer	ICMIC [IC MICROSYSTEMS]

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X25642

5

Operational Notes

The X25642 powers-up in the following state:

• The device is in the low power standby state.

• A HIGH to LOW transition on CS is required to enter

an active state and receive an instruction.

• SO pin is high impedance.

• The “write enable” latch is reset.

Data Protection

The following circuitry has been included to prevent in-

advertent writes:

• The “write enable” latch is reset upon power-up.

• A WREN instruction must be issued to set the “write

enable” latch.

•CS must come HIGH at the proper clock count in or-

der to start a write cycle.

Figure 1. Read E2PROM Array Operation Sequence

0123456789

10

20 21 22 23 24 25 26 27 28 29 30

76543210

DATA OUT

CS

SCK

SI

SO

MSB

HIGH IMPEDANCE

INSTRUCTION

16 BIT ADDRESS

15 14 13

3210

3132 ILL F03.1

Figure 2. Read Status Register Operation Sequence

0123456789

10

11

12 13 14

76543210

DATA OUT

CS

SCK

SI

SO

MSB

HIGH IMPEDANCE

INSTRUCTION

3132 ILL F04

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