This X25160 device has been acquired by

IC MICROSYSTEMS from Xicor, Inc.

1

16K

X25160

2K x 8 Bit

©Xicor, Inc. 1994, 1995, 1996 Patents Pending

Characteristics subject to change without notice

3064-3.9 6/11/96 T4/C1/D0 NS

Direct Write™ and Block Lock™ Protection is a trademark of Xicor, Inc.

SPI Serial E

FEATURES

•2MHz Clock Rate

•SPI Modes (0,0 & 1,1)

•2K X 8 Bits

— 32 Byte Page Mode

•Low Power CMOS

— <1

µA Standby Current

— <5mA Active Current

•2.7V To 5.5V Power Supply

•Block Lock Protection

— Protect 1/4, 1/2 or all of E

•Built-in Inadvertent Write Protection

— Power-Up/Power-Down protection circuitry

— Write Enable Latch

— Write Protect Pin

•Self-Timed Write Cycle

— 5ms Write Cycle Time (Typical)

•High Reliability

— Endurance: 100,000 cycles

— Data Retention: 100 Years

— ESD protection: 2000V on all pins

•8-Lead PDlP Package

•8-Lead SOIC Package

•14-Lead TSSOP Package

DESCRIPTION

The X25160 is a CMOS 16384-bit serial E

2

PROM,

internally organized as 2K x 8. The X25160 features a

Serial Peripheral Interface (SPI) and software protocol

allowing operation on a simple three-wire bus. The bus

signals are a clock input (SCK) plus separate data in (SI) and

data out (SO) lines. Access to the device is con-

trolled through a chip select (CS) input, allowing any

number of devices to share the same bus.

The X25160 also features two additional inputs that

provide the end user with added flexibility. By asserting

the HOLD input, the X25160 will ignore transitions on its

inputs, thus allowing the host to service higher priority

interrupts. The WP input can be used as a hardwire input to

the X25160 disabling all write attempts to the status

register, thus providing a mechanism for limiting end user

capability of altering 0, 1/4, 1/2 or all of the memory.

The X25160 utilizes Xicor’s proprietary Direct Write™ cell,

providing a minimum endurance of 100,000 cycles

and a minimum data retention of 100 years.

FUNCTIONAL DIAGRAM

COMMAND

DECODE

AND

CONTROL

LOGIC

WRITE

CONTROL

AND

TIMING

LOGIC

WRITE

PROTECT

LOGIC

X DECODE

LOGIC

2K BYTE

ARRAY

16 X 256

Y DECODE

DATA REGISTER

SO

SI

SCK

CS

HOLD

WP

16

32

8

32

STATUS

REGISTER

16

32 X 256

16 X 256

3064 ILL F01

IC MICROSYSTEMS

TM