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X24C04S8-2.7 Datasheet(PDF) 10 Page - IC MICROSYSTEMS |
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X24C04S8-2.7 Datasheet(HTML) 10 Page - IC MICROSYSTEMS |
10 / 18 page 10 X24C04 Bus Timing t SU:STA t HD:STA t HD:DAT t SU:DAT t LOW t SU:STO t R t BUF SCL SDA IN SDA OUT t DH t AA t F t HIGH 3839 FHD F04 A.C. CONDITIONS OF TEST Input Pulse Levels VCC x 0.1 to VCC x 0.9 Input Rise and Fall Times 10 ns Input and Output Timing Levels VCC x 0.5 3839 PGM T02 5.0V 1533Ο 100pF Output EQUIVALENT A.C. LOAD CIRCUIT A.C. CHARACTERISTICS (Over recommended operating conditions unless otherwise specified) Read & Write Cycle Limits Symbol Parameter Min. Max. Units fSCL SCL Clock Frequency 0 100 KHz TI Noise Suppression Time 100 ns Constant at SCL, SDA Inputs tAA SCL Low to SDA Data Out Valid 0.3 3.5 ∝ s tBUF Time the Bus Must Be Free Before a 4.7 ∝ s New Transmission Can Start tHD:STA Start Condition Hold Time 4.0 ∝ s tLOW Clock Low Period 4.7 ∝ s tHIGH Clock High Period 4.0 ∝ s tSU:STA Start Condition Setup Time 4.7 ∝ s (for a Repeated Start Condition) tHD:DAT Data In Hold Time 0 ∝ s tSU:DAT Data In Setup Time 250 ns tR SDA and SCL Rise Time 1 ∝ s tF SDA and SCL Fall Time 300 ns tSU:STO Stop Condition Setup Time 4.7 ∝ s tDH Data Out Hold Time 300 ns 3839 PGM T06 POWER-UP TIMING Symbol Parameter Max. Units t PUR (4) Power-up to Read Operation 1 ms t PUW (4) Power-up to Write Operation 5 ms 3839 PGM T07 Notes:(4) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. These parameters are periodically sampled and not 100% tested. |
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