Electronic Components Datasheet Search |
|
X76F641WEG Datasheet(PDF) 2 Page - IC MICROSYSTEMS |
|
X76F641WEG Datasheet(HTML) 2 Page - IC MICROSYSTEMS |
2 / 17 page X76F641 2 PIN DESCRIPTIONS Serial Clock (SCL) The SCL input is used to clock all data into and out of the device. Serial Data (SDA) SDA is a true three state serial data input/output pin. During a read cycle, data is shifted out on this pin. During a write cycle, data is shifted in on this pin. In all other cases, this pin is in a high impedance state. Reset (RST) RST is a device reset pin. When RST is pulsed high the X76F641 will output 32 bits of fixed data which conforms to the standard for “synchronous response to reset”. The part must not be in a write cycle for the response to reset to occur. See Figure 11. If there is power interrupted dur- ing the Response to Reset, the response to reset will be aborted and the part will return to the standby state. The response to reset is "mask programmable" only! DEVICE OPERATION There are two primary modes of operation for the X76F641; Protected READ and protected WRITE. Protected operations must be performed with one of four 8-byte passwords. The basic method of communication for the device is generating a start condition, then transmitting a com- mand, followed by the correct password. All parts will be shipped from the factory with all passwords equal to ‘0’. The user must perform ACK Polling to determine the validity of the password, before starting a data transfer (see Acknowledge Polling.) Only after the correct pass- word is accepted and a ACK polling has been performed, can the data transfer occur. To ensure the correct communication, RST must remain LOW under all conditions except when running a “Response to Reset sequence”. Data is transferred in 8-bit segments, with each transfer being followed by an ACK, generated by the receiving device. If the X76F641 is in a nonvolatile write cycle a “no A CK” (SDA=High) response will be issued in response to loading of the command byte. If a stop is issued prior to the nonvolatile write cycle the write operation will be terminated and the part will reset and enter into a standby mode. The basic sequence is illustrated in Figure 1. PIN NAMES PIN CONFIGURATION After each transaction is completed, the X76F641 will reset and enter into a standby mode. This will also be the response if an unsuccessful attempt is made to access a protected array. Symbol Description SDA Serial Data Input/Output SCL Serial Clock Input RST Reset Input Vcc Supply Voltage Vss Ground NC No Connect SDA VCC RST SCL NC 1 2 3 4 7 8 6 5 EIAJ SOIC VCC RST SCL VSS NC SDA Smart Card NC NC 7025 FM 02 NC GND NC |
Similar Part No. - X76F641WEG |
|
Similar Description - X76F641WEG |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |