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XC6120N102HR Datasheet(PDF) 6 Page - Torex Semiconductor |
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XC6120N102HR Datasheet(HTML) 6 Page - Torex Semiconductor |
6 / 13 page 6/13 XC6120 Series ■OPERATIONAL EXPLANATION The following explains the operation of the typical application circuit along number symbols shown in the timing chart. ① When input voltage (VIN) rises above detect voltage (VDF), output voltage (VOUT) will be equal to input voltage (VIN). (A condition of high impedance exists with N-ch open drain output configurations.) ② When input voltage (VIN) falls below detect voltage (VDF), output voltage (VOUT) will be equal to the ground voltage (VSS) level. ③ When input voltage (VIN) falls to a level below that of the minimum operating voltage (VMIN), output will become unstable. If In this condition, VIN will equal the pulled-up output (should output be pulled-up.) (Input voltage, VIN, in the typical application circuit.) ④ When input voltage (VIN) rises above the minimum operating voltage (VMIN) level until it achieves a release voltage (VDR), output keeps the ground voltage level (VSS). ⑤ When the input voltage (VIN) rises above the release voltage (VDR), output voltage (VOUT will be equal to input voltage (VIN). (A condition of high impedance exists with N-ch open drain output configurations.) ⑥ The difference between VDR and VDF represents the hysteresis width. ●Timing Charge ●Typical Application Circuit Note: For explaining in a simplified case, an operation time of the circuit is not counted. VIN VSS VOUT VIN VOUT R (Unused for the CMOS output products) Input Voltage (VIN) Output Voltage (VOUT) Release Voltage (VDR) Detect Voltage (VDF) Minimum Operating Voltage (VMIN) Ground Voltage (VSS) Ground Voltage (VSS) ①② ④ ③ ⑤ ⑥ |
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