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XC61FC1642LR Datasheet(PDF) 11 Page - Torex Semiconductor |
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XC61FC1642LR Datasheet(HTML) 11 Page - Torex Semiconductor |
11 / 12 page 11/12 XC61F Series MARK CONFIGURATION VOLTAGE (V) A CMOS 0.x B CMOS 1.x C CMOS 2.x D CMOS 3.x E CMOS 4.x F CMOS 5.x H CMOS 6.x N-channel open drain (XC61FN series) MARK CONFIGURATION VOLTAGE (V) K N-ch 0.x L N-ch 1.x M N-ch 2.x N N-ch 3.x P N-ch 4.x R N-ch 5.x S N-ch 6.x MARK VOLTAGE (V) MARK VOLTAGE (V) 0 x.0 5 x.5 1 x.1 6 x.6 2 x.2 7 x.7 3 x.3 8 x.8 4 x.4 9 x.9 VOLTAGE (V) DELAY TIME 5 50 ~ 200ms 6 80 ~ 400ms 7 1 ~ 50ms MARK OUTPUT CONFIGURATION C CMOS N N-ch MARK ② ③ VOLTAGE (V) 3 3 3.3 5 0 5.0 MARK DELAY TIME 1 50ms ~ 200ms 4 80ms ~ 400ms 5 1ms ~ 50ms MARK DETECT VOLTAGE ACCURACY 2 Within +2% MARK PRODUCTION YEAR 3 2003 4 2004 ■ MARKING RULE ● SOT-23, SOT-89 ① Represents integer of detect voltage and output configuration CMOS output (XC61FC series) ② Represents decimal number of detect voltage ③ Represents delay time ④ Represents assembly lot number (Based on internal standards) ● TO-92 ① Represents output configuration ② , ③Represents detect voltage ④ Represents delay time ⑤ Represents detect voltage accuracy ⑥ Represents a least significant digit of the production year (ex.) ⑦ Represents production lot number 0 to 9, A to Z repeated (G, I, J, O, Q, W expected) ① ② ③ ④ 12 3 12 3 |
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