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ADS6223IRGZR Datasheet(PDF) 8 Page - Texas Instruments |
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ADS6223IRGZR Datasheet(HTML) 8 Page - Texas Instruments |
8 / 75 page www.ti.com DIGITAL CHARACTERISTICS ADS6225 ,, ADS6224 ADS6223, ADS6222 SLAS543A – MAY 2007 – REVISED SEPTEMBER 2007 The DC specifications refer to the condition where the digital outputs are not switching, but are permanently at a valid logic level 0 or 1 AVDD = LVDD = 3.3V, IO = 3.5mA, RLOAD = 100Ω (1). All LVDS specifications are characterized, but not tested at production. ADS6225/ADS6224/AD S6223/ADS6222 PARAMETER TEST CONDITIONS UNIT MIN TYP MAX DIGITAL INPUTS High-level input voltage 2.4 V Low-level input voltage 0.8 V High-level input current 10 μA Low-level input current 10 μA Input capacitance 4 pF DIGITAL OUTPUTS High-level output voltage 1375 mV Low-level output voltage 1025 mV |VOD| Output differential voltage 250 350 450 mV VOS Output offset voltage Common-mode voltage of OUTP and OUTM 1200 mV Output capacitance Output capacitance inside the device, from either output to ground 2 pF (1) IO refers to the LVDS buffer current setting, RLOAD is the external differential load resistance between the LVDS output pair. 8 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): ADS6225 ADS6224 ADS6223 ADS6222 |
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