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LT1761 Datasheet(PDF) 7 Page - Linear Technology |
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LT1761 Datasheet(HTML) 7 Page - Linear Technology |
7 / 16 page LT1965 7 1965f TIME (μs) 0 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 80 20 40 60 100 70 10 30 50 90 1965 G26 OUTPUT SHDN VIN = 3.3V COUT = 10μF CERAMIC RL = 2.5k, IL = 1mA FOR VOUT = 2.5V 0 0.0 –100 –50 0 50 100 0.5 1.0 1.5 10 20 30 40 50 60 70 80 1965 G25 TIME (μs) VIN = 4.3V CIN = 10μF CERAMIC COUT = 10μF CERAMIC VOUT = 3.3V PIN FUNCTIONS OUT (Pins 1, 2 / 1, 2 / 4 / 4): Output. This pin supplies power to the load. Use a minimum output capacitor of 10μF to prevent oscillations. Large load transient applica- tions require larger output capacitors to limit peak volt- age transients. See the Applications Information section for more information on output capacitance and reverse output characteristics. ADJ (Pins 3 / 3 / 5 / 5): Adjust. This pin is the input to the error amplifier. It has a typical bias current of 1.3μA that flows into the pin. The ADJ pin voltage is 1.20V referenced to ground. GND (Pins 4, 5 / 4, 5 / 3 / 3): Ground. For the adjustable LT1965, connect the bottom of the resistor divider, setting output voltage, directly to GND for optimum regulation. ⎯S⎯H⎯D⎯N (Pin 6 / 6 / 1 / 1): Shutdown. Pulling the ⎯S⎯H⎯D⎯N pin low puts the LT1965 into a low power state and turns the output off. Drive the ⎯S⎯H⎯D⎯N pin with either logic or an open collector/drain with a pull-up resistor. The resistor sup- plies the pull-up current to the open collector/drain logic, normally several microamperes and the ⎯S⎯H⎯D⎯N pin current, typically less than 6μA. If unused, connect the ⎯S⎯H⎯D⎯N pin to VIN. The LT1965 will be in its low power shutdown state if the ⎯S⎯H⎯D⎯N pin is not connected. The ⎯S⎯H⎯D⎯N pin cannot be driven below GND unless it is tied to the IN pin. If the ⎯S⎯H⎯D⎯N pin is driven below GND while IN is powered, the output will turn on. ⎯S⎯H⎯D⎯N pin logic cannot be referenced to a negative supply rail. IN (Pins 7, 8 / 7, 8 / 2 / 2): Input. This pin supplies power to the device. The LT1965 requires a bypass capacitor at IN if located more than six inches from the main input filter capacitor. Include a bypass capacitor in battery-powered circuits as a battery’s output impedance generally rises with frequency. A bypass capacitor in the range of 1μF to 10μF suffices. The LT1965’s design withstands reverse voltages on the IN pin with respect to ground and the OUT pin. In the case of a reversed input, which occurs if a battery is plugged in backwards, the LT1965 behaves as if a diode is in series with its input. No reverse current flows into the LT1965 and no reverse voltage appears at the load. The device protects itself and the load. Exposed Pad (Pin 9 / 9, DFN and MSOP Packages Only): Ground. Tie this pin directly to Pins 4 and 5 and the PCB ground. This pin provides enhanced thermal performance with its connection to the PCB ground. See the Applica- tions Information section for thermal considerations and calculating junction temperature. (DFN/MSOP/DD-PAK/TO-220) Transient Response ⎯S⎯H⎯D⎯N Transient Response TYPICAL PERFORMANCE CHARACTERISTICS |
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