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LT1461 Datasheet(PDF) 3 Page - Linear Technology

Part # LT1461
Description  Easy-to-Use, Ultra-Tiny 16-Bit ADC
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LT1461 Datasheet(HTML) 3 Page - Linear Technology

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LTC2450-1
3
24501fb
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND. VCC = 2.7V to 5.5V
unless otherwise specified.
Note 3: Guaranteed by design, not subject to test.
Note 4: Integral nonlinearity is defined as the deviation of a code from
a straight line passing through the actual endpoints of the transfer
curve. The deviation is measured from the center of the quantization
band. Guaranteed by design, test correlation and 3 point transfer curve
measurement.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC
Supply Voltage
l
2.7
5.5
V
ICC
Supply Current
Conversion
Sleep
CS = GND (Note 6)
CS = VCC (Note 6)
l
l
350
0.05
600
0.5
μA
μA
The
l denotes the specifications which apply over the full
operating temperature range,otherwise specifications are at TA = 25°C. (Note 2)
POWER REQUIREMENTS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
High Level Input Voltage
l VCC – 0.3
V
VIL
Low Level Input Voltage
l
0.3
V
IIN
Digital Input Current
l
–10
10
μA
CIN
Digital Input Capacitance
10
pF
VOH
High Level Output Voltage
IO = –800μA
l VCC – 0.5
V
VOL
Low Level Output Voltage
IO = –1.6mA
l
0.4
V
IOZ
Hi-Z Output Leakage Current
l
–10
10
μA
The
l denotes the specifications which apply over the full operating temperature
range,otherwise specifications are at TA = 25°C.
The
l denotes the specifications which apply over the full operating temperature
range,otherwise specifications are at TA = 25°C.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
tCONV
Conversion Time
l
14
16.6
21
ms
fSCK
SCK Frequency Range
l
2
MHz
tlSCK
SCK Low Period
l
250
ns
thSCK
SCK High Period
l
250
ns
t1
CS Falling Edge to SDO Low Z
(Notes 7, 8)
l
0100
ns
t2
CS Rising Edge to SDO High Z
(Notes 7, 8)
l
0100
ns
t3
CS Falling Edge to SCK Falling Edge
l
100
ns
tKQ
SCK Falling Edge to SDO Valid
(Note 7)
l
0100
ns
Note 5:
CS = VCC. A positive current is flowing into the DUT pin.
Note 6: SCK = VCC or GND. SDO is high impedance.
Note 7: See Figure 3.
Note 8: See Figure 4.
Note 9: Input sampling current is the average input current drawn from
the input sampling network while the LTC2450-1 is actively sampling the
input.
DIGITAL INPUTS AND DIGITAL OUTPUTS
TIMING CHARACTERISTICS


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