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NCP3101 Datasheet(PDF) 8 Page - ON Semiconductor |
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NCP3101 Datasheet(HTML) 8 Page - ON Semiconductor |
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8 / 18 page  NCP3101 http://onsemi.com 8 UVLO FAULT + - 2 V + - 2 V PHASE TG BST VCC BG GND UVLO FAULT PWM OUT Figure 14. Block Diagram Careful selection and layout of external components is required, to realize the full benefit of the onboard drivers. The capacitors between VCC and GND and between BST and PHASE must be placed as close as possible to the IC. A ground plane should be placed on the closest layer for return currents to GND in order to reduce loop area and inductance in the gate drive circuit. APPLICATION SECTION Input Capacitor Selection The input capacitor has to sustain the ripple current produced during the on time of the upper MOSFET, so it must have a low ESR to minimize the losses. The RMS value of this ripple is: Iin RMS + IOUT D (1 * D) (eq. 2) Where D is the duty cycle, IinRMS is the input RMS current, and IOUT is the load current. The equation reaches its maximum value with D = 0.5. Losses in the input capacitors can be calculated with the following equation: P CIN + ESRCIN Iin RMS 2 (eq. 3) Where PCIN is the power loss in the input capacitors and ESRCIN is the effective series resistance of the input capacitance. Due to large di/dt through the input capacitors, electrolytic or ceramics should be used. If a tantalum capacitor must be used, it must be surge protected. Otherwise, capacitor failure could occur. Calculating Input Startup current To calculate the input startup current, the following equation can be used: I inrush + C OUT V OUT t SS (eq. 4) where Iinrush is the input current during startup, COUT is the total output capacitance, VOUT is the desired output voltage, and tSS is the soft-start interval. If the inrush current is higher than the steady state input current during maximum load, then the input fuse should be rated accordingly, if one is used. Calculating Soft-Start Time To calculate the soft-start time, the following equation can be used. t SS + Cp ) Cc * DV I SS (eq. 5) Where CC is the compensation as well as the soft-start capacitor. CP is the additional capacitor that forms the second pole. ISS is the soft-start current DV is the comp voltage from zero to until it reaches regulation. Vcomp Vout 1.1 V DV Figure 15. Soft-Start The above calculation includes the delay from comp rising to when output voltage becomes valid. To calculate the time of output voltage rising to when it reaches regulation; DV is the difference between the comp voltage reaching regulation and 1.1 V. Output Capacitor Selection Selection of the right value of input and output capacitors determines the behavior of the buck converter. In most high power density applications the capacitor size is most important. Ceramic capacitor is necessary to reduce the high frequency ripple voltage at the input of converter. This capacitor should be located as near the IC as possible. Added electrolytic capacitor improved response of relative slow load change. The required output capacitor will be determined by planned transient deviation requirements. Usually a combination of two types of capacitors is recommended to meet the requirements. First, a ceramic output capacitor is needed for bypassing high frequency noise. Second, an electrolytic output capacitor is needed to achieve good transient response. In fact, during load transient, for the first few microseconds the bulk capacitance supplies current to the |
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