TC4094BP_07 datasheet(7/13 Pages) TOSHIBA

Part #	TC4094BP

Description	8-Stage Shift-and-Store Bus-Register

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Manufacturer	TOSHIBA [Toshiba Semiconductor]

Direct Link	http://www.semicon.toshiba.co.jp/eng

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7 / 13 page

TC4094BP/BF/BFN

2007-10-01

7

Dynamic Electrical Characteristics (Ta = 25°C, VSS = 0 V, CL = 50 pF)

Test Condition

Characteristics

Symbol

VDD (V)

Min

Typ.

Max

Unit

Output transition time

(low to high)

tTLH

⎯

5

10

15

⎯

70

35

30

200

100

80

ns

Output transition time

(high to low)

tTHL

⎯

5

10

15

⎯

70

35

30

200

100

80

ns

Propagation delay time

(CLOCK-QS)

tpLH

tpHL

⎯

5

10

15

⎯

150

75

55

600

250

190

ns

Propagation delay time

(CLOCK-QS’)

tpLH

tpHL

⎯

5

10

15

⎯

155

75

55

460

220

150

ns

Propagation delay time

(CLOCK-Qn)

tpLH

tpHL

⎯

5

10

15

⎯

190

90

65

840

390

270

ns

Propagation delay time

(STROBE-Qn)

tpLH

tpHL

⎯

5

10

15

⎯

150

70

50

580

290

200

ns

Three state disable time

(OUTPUT ENABLE-Qn)

tPHZ

tPZH

RL = 1 kΩ

5

10

15

⎯

60

35

30

200

100

80

ns

Three state disable time

(OUTPUT ENABLE-Qn)

tPLZ

tPZL

RL = 1 kΩ

5

10

15

⎯

70

40

35

200

100

80

ns

Min clock pulse width

tW

⎯

5

10

15

⎯

45

20

15

200

100

80

ns

Min pulse width

(STROBE)

tWH

⎯

5

10

15

⎯

40

20

15

200

80

70

ns

Max clock frequency

fCL

⎯

5

10

15

1.25

2.50

3.00

6

12

16

⎯

MHz

Min set-up time

(DATA-CLOCK)

tSU

⎯

5

10

15

⎯

0

120

55

35

ns

Min hold time

(DATA-CLOCK)

tH

⎯

5

10

15

⎯

10

5

40

20

15

ns

Min set-up time

(CLOCK-STROBE)

tSU

⎯

5

10

15

⎯

90

40

30

200

100

80

ns

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TC4094BP Datasheet(PDF) 7 Page - Toshiba Semiconductor

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