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AX11005 Datasheet(PDF) 1 Page - ASIX Electronics Corporation |
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AX11005 Datasheet(HTML) 1 Page - ASIX Electronics Corporation |
1 / 2 page 6 AX11001/AX11005 Single Chip Microcontroller with TCP/IP and 10/100M Fast Ethernet MAC/PHY Features Product Brief MCU 8-bit pipelined RISC, single cycle per instruction with maximum operating frequency of 100Mhz (100 MIPS) 100% software compatible with standard 8051/80390 2 GPIO ports of 8 bits each 2 external interrupt sources with 2 priority levels Support power management unit, programmable watchdog timer, and 3 16-bit timer/counters Debug port for connecting to In-Circuit Emulation (ICE) adaptor 5 channels of Programmable Counter Array (PCA) On-chip Program and Data Memory Embed 128K (AX11001) or 512KB (AX11005) Flash memory without bank select, and 16KB SRAM for program code mirroring Support initial Flash memory programming via UART or ICE adaptor, the so-called In System Programming (ISP) Support run-time firmware or driver update through Ethernet or UART, the so-called In Application Programming (IAP) Embed 32KB SRAM for data memory Buffer Management Embed DMA engine and memory arbiter. Support 3 DMA channels for high performance data movement needed for network protocol stack processing On-chip 10/100M Fast Ethernet MAC and PHY Integrate IEEE 802.3 10BASE-T/100BASE-TX compatible Fast Ethernet MAC and PHY with dedicated 12KB SRAM for Ethernet packet buffering. Support full-duplex and half-duplex operations Support twisted pair crossover detection and auto-correction (Auto-MDIX) Support wakeup via Link-up, Magic packet, Wakeup frame, external input pin, or UART TCP/IP Build in TCP/IP accelerator in hardware to improve network transfer throughput. Support IP/TCP/UDP/ICMP/IGMP checksum and ARP in hardware Support TCP, UDP, ICMP, IGMP, IPv4, DHCP, BOOTP, ARP, and HTTP in software Communication Interface 3 UART interface (with 1 supporting 921.6Kbps and Modem control) 1 I2C interface (master and slave mode) SPI/Micro wire interface (3 masters or 1 slave mode) 1 1-Wire controller interface (master mode) 10/100 Ethernet PHY interface Support network boot over Ethernet using BOOTP and TFTP Integrate on-chip 3.3V to 1.8V voltage regulator and require single power supply of 3.3V only Integrate on-chip oscillator and PLL. Require only one 25Mhz crystal to operate Integrate on-chip power-on reset circuit 80-pin LQFP or 80-pin TFBGA RoHS package Operating temperature: 0 to 70°C or -40 to 85°C *IEEE is a registered trademark of the Institute of Electrical and Electronic Engineers, Inc. *All other trademarks and registered trademark are the property of their respective holders. Product Description The AX11001/AX11005, Single Chip Microcontroller with TCP/IP and 10/100M Fast Ethernet MAC/PHY, is a System-on-Chip (SoC) solution which offers a high performance embedded micro controller and rich communication peripherals for wide varieties of application which need access to the LAN or Internet. With built-in network protocol stack, the AX11001/AX11005 provides very cost effective networking solution to enable simple, easy, and low cost Internet connection capability for many applications such as consumer electronics, networked home appliances, industrial equipments, security systems, remote data collection equipments, remote control, remote monitoring, and remote management. In addition to stand-alone application, the AX11001/AX11005, with popular TCP/IP protocol suite on-chip and built-in I2C bus or SPI bus, can be used as network co-processor to offload TCP/IP protocol processing loading from system CPU in an embedded system. ASIX Electronics Corporation 4F, No.8, Hsin Ann Rd., Hsinchu Science Park, Hsinchu 30078, Taiwan ASIX Proprietary and Confidential Released Date: 5/31/2007 TEL: +886-3-579-9500 FAX: +886-3-579-9558 http://www.asix.com.tw/ |
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