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P11C68-45DPBS Datasheet(PDF) 8 Page - Zarlink Semiconductor Inc |
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P11C68-45DPBS Datasheet(HTML) 8 Page - Zarlink Semiconductor Inc |
8 / 17 page P10C68/P11C68 8 5.0V 3.3V AUTO RECALL STORE INHIBIT VCC t Figure 8. Automatic RECALL and STORE inhibit. NON-VOLATILE MEMORY OPERATION OF P10C68 MODE SELECTION W X H L H L L H E H L L L L L L G X L X L H L H NE X H H L L L X Power Standby Active Active Active ICC2 Active Mode Not selected Read RAM Write RAM Non-volatile recall (Note 15) Non-volatile store No operation NOTE 15. An automatic RECALL also takes place on chip power-up, starting when Vcc exceeds 3.3V, and taking tRECALL from the time at which Vcc exceeds 3.3V. Vcc must not drop below 3.3V once it has exceeded it for the RECALL to function properly. Standard tWLQX tGHNL tNLWL tWLNH tELWL Alternative tSTORE tWC Parameter Store cycle time Output disable set-up to NE (bar) fall Non-volatile set-up to write low Write low to NE (bar) rise Chip enable SET-UP Symbol Notes 17 18 Units ms ns ns ns ns Min. 0 0 45 0 Max. 10 Min. 0 0 45 0 Max. 10 STORE CYCLE 1 : W (BAR) CONTROLLED (See note 16) P10C68-35 P10C68-45 |
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