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ISPPAC-POWR1014-01T48I Datasheet(PDF) 8 Page - Lattice Semiconductor |
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ISPPAC-POWR1014-01T48I Datasheet(HTML) 8 Page - Lattice Semiconductor |
8 / 45 page Lattice Semiconductor ispPAC-POWR1014/A Data Sheet 8 AC/Transient Characteristics Over Recommended Operating Conditions Symbol Parameter Conditions Min. Typ. Max. Units Voltage Monitors tPD16 Propagation delay input to output glitch filter OFF 16 µs tPD64 Propagation delay input to output glitch filter ON 64 µs Oscillators fCLK Internal master clock frequency (MCLK) 7.6 8 8.4 MHz fCLKEXT Externally applied master clock (MCLK) 7.2 8.8 MHz fPLDCLK PLDCLK output frequency fCLK = 8MHz 250 kHz Timers Timeout Range Range of programmable timers (128 steps) fCLK = 8MHz 0.032 1966 ms Resolution Spacing between available adjacent timer intervals 13 % Accuracy Timer accuracy fCLK = 8MHz -6.67 -12.5 % |
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