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DE

3 V

1.5 V

0 V

1.25 V

1.2 V

1.2 V

1.15 V

Y

Z

1 pF

49.9

Ω ±1%

1.2 V

49.9

Ω ±1%

1 V or 1.4 V

1.2 V

DE

Clock Input

0 V

1/fo

PRBS Input

0 V

PRBS Output

0 V

0 V

0 V

0 V

Actual Output

Ideal Output

1/fo

Period Jitter

Cycle-to-Cycle Jitter

Peak-to-Peak Jitter

Actual Output

SN65LVDS250

SN65LVDT250

SLLS594B – MARCH 2004 – REVISED OCTOBER 2004

PARAMETER MEASUREMENT INFORMATION (continued)

A.

(PRR) = 0.5 Mpps, pulse width = 500

± 10 ns. C

the DUT.

Figure 5. Enable and Disable Time Circuit and Definitions

A.

All input pulses are supplied by an Agilent 81250 Stimulus System.

B.

The measurement is made on a TEK TDS6604 running TDSJIT3 application software.

Figure 6. Driver Jitter Measurement Waveforms

8