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SSM5H08TU Datasheet(PDF) 7 Page - Toshiba Semiconductor |
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SSM5H08TU Datasheet(HTML) 7 Page - Toshiba Semiconductor |
7 / 10 page SSM5H08TU 2007-11-01 7 S a fe o p era tin g area (MO S FET ) 0.001 0.01 0.1 1 10 0.1 1 10 100 Drain-Source voltage VDS (V) DC operation Ta=25℃ IDmax (Continuous) IDmax (Pulsed) * 1ms 10ms 100ms Mounted on FR4 board (25.4 mm ・ 25.4 mm ・ 1.6 t Cu pad: 645 mm2 ) *:Single nonrepetive Pulse Ta ・ 25°C Curves must be derated linealy with increase in temperture. |
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