8

P/N:PM0556

REV. 0.6, DEC. 09, 1998

MX29F022T/B

The Automatic Block Erase does not require the device

to be entirely pre-programmed prior to executing the

Automatic Set-up Block Erase command and Automatic

Block Erase command. Upon executing the Automatic

Block Erase command, the device will automatically

program and verify the block(s) memory for an all-zero

data pattern. The system does not require to provide

any control or timing during these operations.

When the block(s) is automatically verified to contain an

all-zero pattern,a self-timed block erase and verification

begin. The erase and verification operations are

complete when the data on Q7 is "1" and the data on Q6

stops toggling for two consecutive read cycles, at which

time the device returns to the Read mode. The system

does not required to provide any control or timing

during these operations.

When using the Automatic Block Erase algorithm, note

that the erase automatically terminates when adequate

erase margin has been achieved for the memory array

(no erase verification command is required). Sector

erase is a six-bus cycle operation. There are two

"unlock" write cycles. These are followed by writing the

set-up command-80H. Two more "unlock" write cycles

are then followed by the sector erase command-30H.

The sector address is latched on the falling edge of WE,

while the command(data) is latched on the rising edge

of WE. Block addresses selected are loaded into

internal register on the sixth falling edge of WE. Each

successive block load cycle started by the falling edge

of WE must begin within 30ms from the rising edge of

the preceding WE. Otherwise, the loading period ends

and internal auto block erase cycle starts. (Monitor Q3

to determine if the sector erase timer window is still open,

see section Q3, Sector Erase Timer.) Any command

other than Block Erase (30H) or Erase Suspend (B0H)

during the time-out period resets the device to read

mode.

ERASE SUSPEND

This command is only valid while the state machine is

executing Automatic Block Erase operation, and

therefore will only be responded during Automatic/Block

Erase operation. Writing the Erase Suspend command

during the Block Erase time-out immediately terminates

the time-out period and suspends the erase operation.

After this command has been executed, the command

register will initiate erase suspend mode. The state

machine will return to read mode automatically after

suspend is ready. At this time, state machine only

allows the command register to respond to the Read

Memory Array, Erase Resume and Program commands.

The system can determine the status of the program

operation using the Q7 or Q6 status bits, just as in the

standard program operation. After an erase-suspendend

program operation is complete, the system can once

again read array data within non-suspended blocks.

Table 4. Write Operation Status

Mode

Q7

Q6

Q5

Q3

Q2

(Note 1)

(Note 2)

(Note 1)

Standard Mode

Auto Program Algorithm

Q7

Toggle

0

N/A

No Toggle

Auto Erase Algorithm

0

Toggle

0

1

Toggle

Exceed Time Limits

Auto Program

Q7

Toggle

1

0

No Toggle

Auto Sector/Chip Erase

0

Toggle

1

0

N/A

Erase Suspend Mode Reading within Erase Suspended

1

No toggle

0

N/A

Toggle

Sector

Reading within Non-Erase

Data

Data

Data

Data

Data

Suspended Sector

Earse-Suspend-Program

Q7

Toggle

0

N/A

N/A

Note:

1. Q7 and Q2 require a valid address when reading status information. Refer to the appropriate subsection for

further details.

2. Q5 switches to '1' when an Auto Program or Auto Erase operation has exceeded the maximum timing limits.

See "Q5:Exceeded Timing Limits " for more information.

SET-UP AUTOMATIC BLOCK ERASE

COMMANDS

INDEX