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TMS28F200BZT90BDBJE Datasheet(PDF) 8 Page - Texas Instruments |
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TMS28F200BZT90BDBJE Datasheet(HTML) 8 Page - Texas Instruments |
8 / 29 page TMS28F200BZT, TMS28F200BZB 262144 BY 8-BIT/131072 BY 16-BIT BOOT-BLOCK FLASH MEMORIES SMJS200E – JUNE 1994 – REVISED JANUARY 1998 8 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 byte-wide or word-wide mode selection (continued) Table 4. Operation Modes for Word-Wide Mode (BYTE = VIH) MODE E G RP W A9 A0 VPP DQ0 – DQ15 Read VIL VIL VIH VIH X X X Data out VIL VIL VIH VIH VID VIL X Manufacturer-equivalent code 0089h Algorithm-selection mode VIL VIL VIH VIH VID VIH X Device-equivalent code 2274h (top boot block) VIL VIL VIH VIH VID VIH X Device-equivalent code 2275h (bottom boot block) Output disable VIL VIH VIH VIH X X X Hi-Z Standby VIH X VIH X X X X Hi-Z Reset / deep power down X X VIL X X X X Hi-Z Write (see Note 1) VIL VIH VIH or VHH VIL X X VPPL or VPPH Data in X = Don’t care NOTE 1: When writing commands to the ’28F200BZx, VPP must be VPPH for block-erase or program commands to be executed and RP must be held at VHH for the entire boot-block program or erase operation. Table 5. Operation Modes for Byte-Wide Mode (BYTE = VIL) MODE E G RP W A9 A0 VPP DQ15 / A –1 DQ8 – DQ14 DQ0 – DQ7 Read lower byte VIL VIL VIH VIH X X X VIL Hi-Z Data out Read upper byte VIL VIL VIH VIH X X X VIH Hi-Z Data out VIL VIL VIH VIH VID VIL X X Hi-Z Manufacturer-equivalent code 89h Algorithm-selection Device-equivalent code g mode VIL VIL VIH VIH VID VIH X X Hi Z q 74h (top boot block) VIL VIL VIH VIH VID VIH X X Hi-Z Device-equivalent code 75h (bottom boot block) Output disable VIL VIH VIH VIH X X X X Hi-Z Hi-Z Standby VIH X VIH X X X X X Hi-Z Hi-Z Reset / deep power down X X VIL X X X X X Hi-Z Hi-Z Write (see Note 1) VIL VIH VIH or VHH VIL X X VPPL or VPPH X Hi-Z Data in X = Don’t care NOTE 1: When writing commands to the ’28F200BZx, VPP must be VPPH for block-erase or program commands to be executed and RP must be held at VHH for the entire boot-block program or erase operation. command state machine operations The CSM decodes instructions for clear-status-register, read, read-algorithm-selection-code, read-status-register, program, erase, erase-suspend, and erase-resume operations. The 8-bit command code is input to the device on DQ0 – DQ7 (see Table 1 for CSM codes). During a program or erase cycle, the CSM informs the WSM that a program or erase cycle has been requested. During a program cycle, the WSM controls the program sequences and the CSM responds only to status-reads. |
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