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IDT74FCT162374ETPV Datasheet(PDF) 6 Page - Integrated Device Technology |
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IDT74FCT162374ETPV Datasheet(HTML) 6 Page - Integrated Device Technology |
6 / 8 page 5.8 6 IDT54/74FCT16374T/AT/CT/ET, 162374T/AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE) MILITARY AND INDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE FCT16374T/162374T FCT16374AT/162374AT Com'l. Mil. Com'l. Mil. Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit tPLH tPHL Propagation Delay xCLK to xOx CL = 50pF RL = 500 Ω 2.0 10.0 2.0 11.0 2.0 6.5 2.0 7.2 ns tPZH tPZL Output Enable Time 1.5 12.5 1.5 14.0 1.5 6.5 1.5 7.5 ns tPHZ tPLZ Output Disable Time 1.5 8.0 1.5 8.0 1.5 5.5 1.5 6.5 ns tSU Set-up Time HIGH or LOW, xDx to xCLK 2.0 — 2.0 — 2.0 — 2.0 — ns tH Hold Time HIGH or LOW, xDx to xCLK 1.5 — 1.5 — 1.5 — 1.5 — ns tW xCLK Pulse Width HIGH or LOW 7.0 — 7.0 — 5.0 — 6.0 — ns tSK(o) Output Skew(3) — 0.5 — 0.5 — 0.5 — 0.5 ns NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. 4. This limit is guaranteed but not tested. 2542 tbl 09 FCT16374CT/162374CT FCT16374ET/162374ET Com'l. Mil. Com'l. Mil. Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit tPLH tPHL Propagation Delay xCLK to xOx CL = 50pF RL = 500 Ω 2.0 5.2 2.0 6.2 1.5 3.7 — — ns tPZH tPZL Output Enable Time 1.5 5.5 1.5 6.2 1.5 4.4 — — ns tPHZ tPLZ Output Disable Time 1.5 5.0 1.5 5.7 1.5 3.6 — — ns tSU Set-up Time HIGH or LOW, xDx to xCLK 2.0 — 2.0 — 1.5 — — — ns tH Hold Time HIGH or LOW, xDx to xCLK 1.5 — 1.5 — 0.0 — — — ns tW xCLK Pulse Width HIGH or LOW 5.0 — 6.0 — 3.0(4) ——— ns tSK(o) Output Skew(3) — 0.5 — 0.5 — 0.5 — — ns |
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