S7033/S7034 series are families of FFT-CCD image sensors specifically designed for low-light-level detection in scientific applications.

S7033/S7034 series feature large full-well capacity in horizontal CCD register. By using the binning operation, S7033/S7034 series can be used

as a linear image sensor having a long height. This makes S7033/S7034 series ideally suited for use in spectrophotometry. The binning operation

offers significant improvement in S/N and signal processing speed compared with conventional methods by which signals are digitally added by

an external circuit.

S7033/S7034 series have an effective pixel size of 24 × 24

Either one-stage or two-stage thermoelectric cooler is built into the package (S7034/S7035 series). At room temperature operation, the

device can be cooled down to -10 ˚C by one-stage cooler and -30 ˚C by two-stage cooler respectively without using any other cooling technique.

In addition since both the CCD chip and the thermoelectric cooler are hermetically sealed, no dry air is required, thus allowing easy handling.

Features

l Line, pixel binning

l Greater than 90 % quantum efficiency at peak sensitivity

wavelength

l Wide spectral range

l Wide dynamic range

l MPP operation

l Built-in thermoelectric cooler

Applications

l Fluorescence spectrometer, ICP

l Industrial inspection requiring

l Semiconductor inspection

l DNA sequencer

l Low-light-level detection

IMAGE

SENSOR

CCD area image sensor

Back-thinned FFT-CCD

S7033/S7034 series

s Selection guide

Type No.

Cooling

Number of total

pixels

Number of active

pixels

Active area

[m m (H ) × m m (V)]

Suitable

multichannel

detector head

S7033-0907

532 × 128

512 × 122

12.288 × 2.928

S7033-1007

Non-cooled

1044 × 128

1024 × 122

24.576 × 2.928

C7043

S7034-0907S

532 × 128

512 × 122

12.288 × 2.928

S7034-1007S

One-stage

TE-cooled

1044 × 128

1024 × 122

24.576 × 2.928

C7044

Note) Two-stage TE-cooled type (S7035 series) is also available

s General ratings

Parameter

S7033 series

S7034 series

Pixel size

24 (H) × 24 (V) µm

Vertical clock phase

2 phase

Horizontal clock phase

2 phase

Output circuit

One-stage MOSFET source follower

Package

24 pin ceramic DIP (refer to dimensional outlines)

Built-in cooler

-

One-stage

Quartz glass

Sapphire

*1: Window-less is available upon request.

1