Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

SN74V3640-15PEU Datasheet(PDF) 9 Page - Texas Instruments

Part # SN74V3640-15PEU
Description  102436, 204836, 409636, 819236, 1638436, 32768 횞 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
Download  50 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN74V3640-15PEU Datasheet(HTML) 9 Page - Texas Instruments

Back Button SN74V3640-15PEU Datasheet HTML 5Page - Texas Instruments SN74V3640-15PEU Datasheet HTML 6Page - Texas Instruments SN74V3640-15PEU Datasheet HTML 7Page - Texas Instruments SN74V3640-15PEU Datasheet HTML 8Page - Texas Instruments SN74V3640-15PEU Datasheet HTML 9Page - Texas Instruments SN74V3640-15PEU Datasheet HTML 10Page - Texas Instruments SN74V3640-15PEU Datasheet HTML 11Page - Texas Instruments SN74V3640-15PEU Datasheet HTML 12Page - Texas Instruments SN74V3640-15PEU Datasheet HTML 13Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 50 page
background image
SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690
1024
× 36, 2048 × 36, 4096 × 36, 8192 × 36, 16384 × 36, 32768 × 36
3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
first-word fall-through/serial in (FWFT/SI)
FWFT/SI is a dual-purpose pin. During master reset, the state of the FWFT/SI input determines whether the
device operates in standard or FWFT mode.
If, at the time of master reset, FWFT/SI is low, standard mode is selected. This mode uses EF to indicate whether
any words are present in the FIFO memory. It also uses FF to indicate whether the FIFO memory has free space
for writing. In standard mode, every word read from the FIFO, including the first, must be requested using REN
and RCLK.
If, at the time of master reset, FWFT/SI is high, FWFT mode is selected. This mode uses OR to indicate whether
there is valid data at the data outputs (Qn). It also uses IR to indicate whether the FIFO memory has free space
for writing. In the FWFT mode, the first word written to an empty FIFO goes directly to Qn after three RCLK rising
edges, therefore, REN = low is not necessary. Subsequent words must be accessed using REN and RCLK.
After master reset, FWFT/SI acts as a serial input for loading PAE and PAF offsets into the programmable
registers. The serial input function can be used only when the serial loading method is selected during master
reset. Serial programming using the FWFT/SI pin functions the same way in both standard and FWFT modes.
write clock (WCLK)
A write cycle is initiated on the rising edge of the WCLK input. Data setup and hold times must be met, with
respect to the low-to-high transition of the WCLK. It is permissible to stop WCLK. Note that while WCLK is idle,
the FF/IR, PAF, and HF flags are not updated. WCLK is capable only of updating HF flag to low. The write and
read clocks can be independent or coincident.
write enable (WEN)
When WEN is low, data may be loaded into the FIFO RAM array on the rising edge of every WCLK cycle if the
device is not full. Data is stored in the RAM array sequentially and independently of any ongoing read operation.
When WEN is high, no new data is written in the RAM array on each WCLK cycle.
To prevent data overflow in the standard mode, FF goes low, inhibiting further write operations. After completion
of a valid read cycle, FF goes high, allowing a write to occur. FF is updated by two WCLK cycles + tsk after the
RCLK cycle.
To prevent data overflow in the FWFT mode, IR goes high, inhibiting further write operations. After completion
of a valid read cycle, IR goes low, allowing a write to occur. The IR flag is updated by two WCLK cycles + tsk
after the valid RCLK cycle.
WEN is ignored when the FIFO is full in either FWFT or standard mode.
read clock (RCLK)
A read cycle is initiated on the rising edge of the RCLK input. Data can be read on the outputs, on the rising edge
of the RCLK input. It is permissible to stop RCLK. While RCLK is idle, the EF/OR, PAE, and HF flags are not
updated. RCLK is capable only of updating the HF flag to high. The write and read clocks can be independent
or coincident.


Similar Part No. - SN74V3640-15PEU

ManufacturerPart #DatasheetDescription
logo
Texas Instruments
SN74V215 TI-SN74V215 Datasheet
555Kb / 40P
[Old version datasheet]   512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
SN74V215 TI-SN74V215 Datasheet
590Kb / 43P
[Old version datasheet]   512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
SN74V215-10PAG TI-SN74V215-10PAG Datasheet
590Kb / 43P
[Old version datasheet]   512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
SN74V215-10PAG TI-SN74V215-10PAG Datasheet
600Kb / 43P
[Old version datasheet]   512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
SN74V215-15PAG TI-SN74V215-15PAG Datasheet
590Kb / 43P
[Old version datasheet]   512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
More results

Similar Description - SN74V3640-15PEU

ManufacturerPart #DatasheetDescription
logo
Texas Instruments
SN74ALVC3651 TI-SN74ALVC3651 Datasheet
383Kb / 26P
[Old version datasheet]   2048 횞 36 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
SN74ACT3641 TI-SN74ACT3641 Datasheet
379Kb / 26P
[Old version datasheet]   1024 횞 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN54ACT3641 TI-SN54ACT3641 Datasheet
377Kb / 26P
[Old version datasheet]   1024 횞 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN74ACT3651 TI-SN74ACT3651 Datasheet
376Kb / 26P
[Old version datasheet]   2048 횞 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN74ACT3651 TI1-SN74ACT3651_09 Datasheet
470Kb / 29P
[Old version datasheet]   2048 횞 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN74ACT3632 TI1-SN74ACT3632_08 Datasheet
503Kb / 30P
[Old version datasheet]   512 횞 36 횞 2CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74V263 TI-SN74V263 Datasheet
803Kb / 52P
[Old version datasheet]   8192 횞 18, 16384 횞 18, 32768 횞 18, 65536 횞 18 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SN74ACT3622 TI-SN74ACT3622 Datasheet
417Kb / 28P
[Old version datasheet]   256 횞 36 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN54ACT3632 TI-SN54ACT3632 Datasheet
383Kb / 25P
[Old version datasheet]   512 횞 36 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74ABT3612 TI-SN74ABT3612 Datasheet
462Kb / 31P
[Old version datasheet]   64 횞 36 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com