 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMS320DM6467 Datasheet(PDF) 2 Page - Texas Instruments |
|
|
||||||||||||||||||||||||||||||
TMS320DM6467 Datasheet(HTML) 2 Page - Texas Instruments |
|
|
2 / 334 page  www.ti.com TMS320DM6467 Digital Media System-on-Chip SPRS403 – DECEMBER 2007 • External Memory Interfaces (EMIFs) • One Serial Peripheral Interface (SPI) With Two – 32-Bit DDR2 SDRAM Memory Controller Chip-Selects With 256M-Byte Address Space (1.8-V I/O) • Master/Slave Inter-Integrated Circuit (I2C – Asynchronous16-Bit Wide EMIF (EMIFA) Bus™) With 128M-Byte Address Reach • Two Multichannel Audio Serial Ports (McASPs) • Flash Memory Interfaces – One Four Serializer Transmit/Receive Port – NOR (8-/16-Bit-Wide Data) – One Single DIT Transmit Port for S/PDIF – NAND (8-/16-Bit-Wide Data) • 32-Bit Host Port Interface (HPI) • Enhanced Direct-Memory-Access (EDMA) • VLYNQ™ Interface (FPGA Interface) Controller (64 Independent Channels) • Two Pulse Width Modulator (PWM) Outputs – Programmable Default Burst Size • ATA/ATAPI I/F (ATA/ATAPI-6 Specification) • 10/100/1000 Mb/s Ethernet MAC (EMAC) • Up to 33 General-Purpose I/O (GPIO) Pins – IEEE 802.3 Compliant (3.3-V I/O Only) (Multiplexed With Other Device Functions) – Supports MII and GMII Media Independent Interfaces • On-Chip ARM ROM Bootloader (RBL) – Management Data I/O (MDIO) Module • Individual Power-Saving Modes for ARM/DSP • USB Port With Integrated 2.0 PHY • Flexible PLL Clock Generators – USB 2.0 High-/Full-Speed Client • IEEE-1149.1 (JTAG) Boundary- – USB 2.0 High-/Full-/Low-Speed Host Scan-Compatible (Mini-Host, Supporting One External • 529-Pin Pb-Free BGA Package Device) (ZUT Suffix), 0.8-mm Ball Pitch • 32-Bit, 33-MHz, 3.3 V Peripheral Component • 0.09-µm/7-Level Cu Metal Process (CMOS) Interconnect (PCI) Master/Slave Interface • 3.3-V and 1.8-V I/O, 1.2-V Internal – Conforms to PCI Specification 2.3 • Applications: • Two 64-Bit General-Purpose Timers (Each – Video Encode/Decode/Transcode/Transrate Configurable as Two 32-Bit Timers) – Digital Media • One 64-Bit Watch Dog Timer – Networked Media Encode/Decode • Three Configurable UART/IrDA/CIR Modules – Video Imaging (One With Modem Control Signals) – Video Infrastructure – Supports up to 1.8432 Mbps UART – Video Conferencing – SIR and MIR (0.576 MBAUD) – CIR With Programmable Data Encoding 2 Digital Media System-on-Chip (DMSoC) Submit Documentation Feedback |
Similar Part No. - TMS320DM6467 |
|
Similar Description - TMS320DM6467 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
