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IRS2117SPBF Datasheet(PDF) 2 Page - International Rectifier |
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IRS2117SPBF Datasheet(HTML) 2 Page - International Rectifier |
2 / 19 page www.irf.com 2 IRS2117/IRS2118(S)PbF Symbol Definition Min. Max. Units VB High-side floating supply voltage -0.3 625 VS High-side floating supply offset voltage VB - 25 VB + 0.3 VHO High-side floating output voltage VS - 0.3 VB + 0.3 VCC Logic supply voltage -0.3 25 VIN Logic input voltage -0.3 VCC + 0.3 dVs/dt Allowable offset supply voltage transient (Fig. 2) — 50 V/ns PD Package power dissipation @ TA ≤ +25 °C (8 lead PDIP) — 1.0 (8 lead SOIC) — 0.625 RthJA Thermal resistance, junction to ambient (8 lead PDIP) — 125 (8 lead SOIC) — 200 TJ Junction temperature — 150 TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) — 300 Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figs. 5 through 8. Symbol Definition Min. Max. Units VB High-side floating supply absolute voltage VS + 10 VS + 20 VS High-side floating supply offset voltage Note 1 600 VHO High-side floating output voltage VS VB VCC Logic supply voltage 10 20 VIN Logic input voltage 0 VCC TA Ambient temperature -40 125 °C Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15 V differential. W °C/W V °C V PDF created with pdfFactory trial version www.pdffactory.com |
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