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PCA9306DC1 Datasheet(PDF) 8 Page - NXP Semiconductors |
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PCA9306DC1 Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 21 page  PCA9306_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 21 February 2007 8 of 21 NXP Semiconductors PCA9306 Dual bidirectional I2C-bus and SMBus voltage-level translator 10. Dynamic characteristics Table 7. Dynamic characteristics (translating down) Tamb = −40 °C to +85 °C, unless otherwise specified. Values guaranteed by design. Symbol Parameter Conditions CL =50pF CL =30pF CL =15pF Unit Min Max Min Max Min Max VI(EN) = 3.3 V; VIH = 3.3 V; VIL =0V; VM = 1.15 V (see Figure 8) tPLH LOW-to-HIGH propagation delay from (input) SCL2 or SDA2 to (output) SCL1 or SDA1 0 2.0 0 1.2 0 0.6 ns tPHL HIGH-to-LOW propagation delay from (input) SCL2 or SDA2 to (output) SCL1 or SDA1 0 2.0 0 1.5 0 0.75 ns VI(EN) = 2.5 V; VIH = 2.5 V; VIL =0V; VM = 0.75 V (see Figure 8) tPLH LOW-to-HIGH propagation delay from (input) SCL2 or SDA2 to (output) SCL1 or SDA1 0 2.0 0 1.2 0 0.6 ns tPHL HIGH-to-LOW propagation delay from (input) SCL2 or SDA2 to (output) SCL1 or SDA1 0 2.5 0 1.5 0 0.75 ns Table 8. Dynamic characteristics (translating up) Tamb = −40 °C to +85 °C, unless otherwise specified. Values guaranteed by design. Symbol Parameter Conditions CL =50pF CL =30pF CL =15pF Unit Min Max Min Max Min Max VI(EN) = 3.3 V; VIH = 2.3 V; VIL =0V; VTT = 3.3 V; VM = 1.15 V; RL = 300 Ω (see Figure 8) tPLH LOW-to-HIGH propagation delay from (input) SCL1 or SDA1 to (output) SCL2 or SDA2 0 1.75 0 1.0 0 0.5 ns tPHL HIGH-to-LOW propagation delay from (input) SCL1 or SDA1 to (output) SCL2 or SDA2 0 2.75 0 1.65 0 0.8 ns VI(EN) = 2.5 V; VIH = 1.5 V; VIL =0V; VTT = 2.5 V; VM = 0.75 V; RL = 300 Ω (see Figure 8) tPLH LOW-to-HIGH propagation delay from (input) SCL1 or SDA1 to (output) SCL2 or SDA2 0 1.75 0 1.0 0 0.5 ns tPHL HIGH-to-LOW propagation delay from (input) SCL1 or SDA1 to (output) SCL2 or SDA2 0 3.3 0 2.0 0 1.0 ns a. Load circuit b. Timing diagram S1 = translating up; S2 = translating down. CL includes probe and jig capacitance. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz; Zo =50 Ω; tr ≤ 2 ns; tf ≤ 2ns. The outputs are measured one at a time, with one transition per measurement. Fig 8. Load circuit for outputs 002aab845 VTT RL S1 S2 (open) CL from output under test 002aab846 VIH VIL VM VM input output VOH VOL VM VM |
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