ISSUE 5.0 November 1999

SYS8512FKX-70/85/10/12

6

Write Cycle No.2 Timing Waveform

Write Cycle No.2 Timing Waveform

Write Cycle No.2 Timing Waveform

Write Cycle No.2 Timing Waveform

Write Cycle No.2 Timing Waveform

AC Characteristics Notes

AC Characteristics Notes

AC Characteristics Notes

AC Characteristics Notes

AC Characteristics Notes

(1) A write occurs during the overlap (t

(2) t

(3) t

(4) t

(5) During this period, I/O pins are in the output state. Input signals out of phase must not be applied.

(6) If CS goes low simultaneously with WE going low or after WE going low , outputs remain in a high impedance state.

(7) D

(8) D

(9) If CS is low during this period, I/O pins are in the output state, and inputs out of phase must not be applied to I/O pins.

(10) This parameter is sampled and not 100% tested.

(11) t

levels. This parameter is sampled and not 100% tested.

CW (2)

WR (4)

WC

AS (3)

DW

DH

OH

OW

WHZ(5)

AW

WP (1)

Don't

t

t

t

t

t

t

Address

CS

WE

Dout

Din

t

t

t

t

t

Care

High-Z

High-Z

(7)

(8)

Data Retention Waveform

Data Retention Waveform

Data Retention Waveform

Data Retention Waveform

Data Retention Waveform

4.5V

2.2V

4.5V

2.2V

0V

DATA RETENTION MODE

Vcc

CS

CS > Vcc -0.2V