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PUMA68S4000X-012 Datasheet(PDF) 6 Page - MOSAIC |
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PUMA68S4000X-012 Datasheet(HTML) 6 Page - MOSAIC |
6 / 11 page Issue 5.1 April 2001 PAGE 6 Read Cycle 1 3,6,7,9 (Address Controlled) Read Cycle 2 3,6,8,9 (/CS Controlled) Address DOUT tRC tAA tOH Data Valid /CS /OE DOUT Current Supply Data Valid 50% 50% t RC 1 t OE tOLZ tPU t CLZ tPD t OHZ tCHZ I CC I SB Notes 1 During VCC power-up, a pull-up resistor to VCC on /CS is required to meet I SB specification. 2 This parameter is sampled and not 100% tested. 3 For test conditions, see AC Test Conditions, Figures A, B, C. 4 tCLZ and tCHZ are specified with CL = 5pF as in Figure C. Transition is measured ±500mV from steady-state voltage. 5 This parameter is guaranteed but not tested. 6 /WE is HIGH for read cycle. 7 /CS and /OE are LOW for Read cycle. 8 Address valid prior to or coincident with CS transition LOW. 9 All read cycle timings are referenced from the last valid address to the first transitioning address. 10 /CS or /WE must be HIGH during address transitions. 11 All write cycle timings are referenced from the last valid address to the first transitioning address. |
Similar Part No. - PUMA68S4000X-012 |
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Similar Description - PUMA68S4000X-012 |
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