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NU-73D74D-PG Datasheet(PDF) 3 Page - Optoway Technology Inc |
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NU-73D74D-PG Datasheet(HTML) 3 Page - Optoway Technology Inc |
3 / 5 page Optoway NU-73D74D-PG **************************************************************************************************************************************************************************** ***************************************************************************************************************************************************************************** OPTOWAY TECHNOLOGY INC. No.38, Kuang Fu S. Road, Hu Kou, Hsin Chu Industrial Park, Hsin Chu, Taiwan 303 Tel: 886-3-5979798 Fax: 886-3-5979737 E-mail: sales@optoway.com.tw http: // www.optoway.com.tw 1/1/2006 V5.0 3 Receiver Characteristics ( 0 oC < Topr < 70oC, 3.13V < Vcc < 3.47V ) Parameter Symbol Min. Typ. Max. Units Notes Optical Sensitivity Sen -26 dBm 3 Saturation Optical Power Sat -3 dBm 3 Wavelength of Operation 1480 1500 nm 4 Rejection of 1550 nm Signal 40 dB Signal Detect Assert Level Pa -26 dBm Signal Detect Deassert Level Pd -45 dBm Signal Detect Hysteresis 1.0 dB Data Rate 1.25 Gb/s Optical Return Loss 14 dB Electrical Power Supply Current Icc 100 130 mA Data Output Voltage – Low VOL - VCC -2.0 -1.58 V 5 Data Output Voltage – High VOH - VCC -1.1 -0.74 V 5 SD Output Voltage -- Low VOL - VCC 0.8 V SD Output Voltage -- High VOH - VCC 2.0 V Signal Detect Assert Time ASMAX 100 µs OFF to ON Signal Detect Deassert Time ANSMAX 300 µs ON to OFF 3. Sensitivity and saturation levels at BER 1E-12 @ 2 7-1 PRBS @ER=9. 4. At least 30 dB optical isolation for the wavelength 1260 to 1360 nm. 5. These inputs are compatible with 10K, 10KH and 100K ECL and LVPECL outputs. CONNECTION DIAGRAM PIN Symbol I/O Notes 1 RX-VEE I Directly connect this pin to the receiver ground plane 2 RX-VCC I +3.3V dc power for the receiver section 3 SD O Active high on this indicates presence of received optical signal (LVTTL) 4 RD − O Receiver Dataout AC coupled. 5 RD+ O Receiver Dataout. AC coupled. 6 TX-VCC I +3.3V dc power for the transmitter section 7 TX-VEE I Directly connect this plan to the transmitter ground plane 8 BEN I TX Burst enable Control. When this pin is “Hi (LVTTL/LVCMOS)”, TX burst is enabled. When this pin is “Lo (LVTTL/LVCMOS)”, TX burst is disabled. This pin is internally pulled to “Hi”. 9 TD+ I Transmitter Data In. DC coupled. 10 TD- I Transmitter Data Bar In. DC coupled. MS MS Mounting Studs. Connect to Chassis Ground |
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