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HYS72T256322HP-3.7-A Datasheet(PDF) 4 Page - Qimonda AG |
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HYS72T256322HP-3.7-A Datasheet(HTML) 4 Page - Qimonda AG |
4 / 36 page Internet Data Sheet Rev. 1.01, 2006-09 4 03062006-PK3L-ZYSE HYS72T256322HP–[3S/3.7]–A Registered DDR2 SDRAM Modules 1.2 Description The Qimonda HYS72T256322HP–[3S/3.7]–A module family are Very Low Profile (VLP) Registered Dual-Die DIMM (RDIMM with parity) with 18.30 mm height based on DDR2 technology. DIMMs are available as ECC modules in 256M x 72 (2 GByte) organization and density, intended for mounting into 240-Pin connector sockets. The memory array is designed with 512-Mbit Double-Data- Rate-Two (DDR2) Synchronous DRAMs. All control and address signals are re-driven on the DIMM using register devices and a PLL for the clock distribution. This reduces capacitive loading to the system bus, but adds one cycle to the SDRAM timing. Decoupling capacitors are mounted on the PCB board. The DIMMs feature serial presence detect based on a serial E2PROM device using the 2-pin I2C protocol. The first 128 bytes are programmed with configuration data and the second 128 bytes are available to the customer. TABLE 2 Ordering Information for RoHS Compliant Products TABLE 3 Address Format TABLE 4 Components on Modules Product Type1) 1) All part numbers end with a place code, designating the silicon die revision. Example: HYS72T256322HP–3.7–A, indicating Rev. “A” dies are used for DDR2 SDRAM components. For all Qimonda DDR2 module and component nomenclature see Chapter 6 of this data sheet. Compliance Code2) 2) The Compliance Code is printed on the module label and describes the speed grade, for example “PC2–4200P–444–12–W0”, where 4200P means Registered Parity DIMM modules with 4.26 GB/sec Module Bandwidth and “444-12” means Column Address Strobe (CAS) latency = 4, Row Column Delay (RCD) latency = 4 and Row Precharge (RP) latency = 4 using the latest JEDEC SPD Revision 1.2 and produced on the Raw Card “W” Description SDRAM Technology PC2-5300 HYS72T256322HP–3S–A 2 GB 2R ×4 PC2–5300P–555–12–W0 2 Ranks, ECC 512 Mbit ( ×4) PC2-4200 HYS72T256322HP–3.7–A 2 GB 2R ×4 PC2–4200P–444–12–W0 2 Ranks, ECC 512 Mbit ( ×4) DIMM Density Module Organization Memory Ranks ECC/ Non-ECC # of SDRAMs # of row/bank/columns bits Raw Card 2 GB 256M × 72 2 ECC 18 14/2/11 W Product Type1) 1) Green Product DRAM Components1) DRAM Density DRAM Organization Note2) 2) For a detailed description of all available functions of the DRAM components on these modules see the component data sheet. HYS72T256322HP HYB18T1G402AF 512 Mbit 2 x 128M × 4 |
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