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HYS72T128000HP-3.7-A Datasheet(PDF) 3 Page - Qimonda AG |
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HYS72T128000HP-3.7-A Datasheet(HTML) 3 Page - Qimonda AG |
3 / 49 page Internet Data Sheet Rev. 1.02, 2007-07 3 03292006-08VU-L8WK HYS72T[64/128/256]xx0HP–[3S/3.7]–A Registered DDR2 SDRAM Modules 1Overview This chapter gives an overview of the 1.8 V 240-Pin Registered DDR2 SDRAM Modules with parity bit product family and describes its main characteristics. 1.1 Features • 240-Pin PC2–5300 and PC2–4200 DDR2 SDRAM memory modules. • One rank 64M ×72, 128M ×72, and two ranks 128M ×72, 256M ×72, and four rank 256M ×72 module organization and 64M ×8, 128M ×4 chip organization • Registered DIMM Parity bit for address and control bus • 512 MB, 1 GB, and 2 GB module built with 512 Mbit DDR2 SDRAMs in P-TFBGA-60 chipsize packages. • Standard Double-Data-Rate-Two Synchronous DRAMs (DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power supply • All speed grades faster than DDR2–400 comply with DDR2–400 timing specifications. • Programmable CAS Latencies (3, 4, 5, 6), Burst Length (4 & 8) • Auto Refresh (CBR) and Self Refresh • Programmable self refresh rate via EMRS2 setting • Programmable partial array refresh via EMRS2 settings • DCC enabling via EMRS2 setting • All inputs and outputs SSTL_18 compatible • Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT) • Serial Presence Detect with E2PROM • RDIMM Dimensions (nominal): 30 mm high, 133.35 mm wide • Based on standard reference card layouts Raw Card “G”, “H“, “J“, ”N” and “F“ • RoHS compliant products1) TABLE 1 Performance Table 1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers. Product Type Speed Code –3S –3.7 Unit DRAM Speed Grade DDR2–667D DDR2–533C Module Speed Grade PC2–5300 PC2–4200 CAS-RCD-RP latencies 5-5-5 4-4-4 t CK Max. Clock Frequency @CL5 f CK5 333 266 MHz @CL4 f CK4 266 266 MHz @CL3 f CK3 200 200 MHz Min. RAS-CAS-Delay t RCD 15 15 ns Min. Row Precharge Time t RP 15 15 ns Min. Row Active Time t RAS 45 45 ns Min. Row Cycle Time t RC 60 60 ns |
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