HYS64T128020EML-3.7-B datasheet(8/39 Pages) QIMONDA

Part #	HYS64T128020EML-3.7-B

Description	214-Pin Unbuffered DDR2 SDRAM MicroDIMM Modules Low Power

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Manufacturer	QIMONDA [Qimonda AG]

Direct Link	http://www.qimonda.com

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Preliminary Internet Data Sheet

Rev. 0.5, 2007-05

8

05212007-7F24-MITO

HYS64T128020EML-[3S/3.7/5]-B

Unbuffered DDR2 SDRAM MicroDIMM Modules

200

DQ54

I/O

SSTL

Data Bus 39:57

201

DQ55

I/O

SSTL

95

DQ56

I/O

SSTL

96

DQ57

I/O

SSTL

101

DQ58

I/O

SSTL

102

DQ59

I/O

SSTL

203

DQ60

I/O

SSTL

204

DQ61

I/O

SSTL

208

DQ62

I/O

SSTL

209

DQ63

I/O

SSTL

7

DQS0

I/O

SSTL

Data Strobes 7:0

Note: The data strobes, associated with one data byte, sourced with data

transfers. In Write mode, the data strobe is sourced by the

controller and is centered in the data window. In Read mode the

data strobe is sourced by the DDR2 SDRAM and is sent at the

leading edge of the data window. DQS signals are complements,

and timing is relative to the crosspoint of respective DQS and DQS.

If the module is to be operated in single ended strobe mode, all

DQS signals must be tied on the system board to

V

SS and DDR2

SDRAM mode registers programmed appropriately.

2. See block diagram for corresponding DQ signals

6

DQS0

I/O

SSTL

19

DQS1

I/O

SSTL

18

DQS1

I/O

SSTL

28

DQS2

I/O

SSTL

27

DQS2

I/O

SSTL

140

DQS3

I/O

SSTL

139

DQS3

I/O

SSTL

71

DQS4

I/O

SSTL

70

DQS4

I/O

SSTL

186

DQS5

I/O

SSTL

185

DQS5

I/O

SSTL

198

DQS6

I/O

SSTL

197

DQS6

I/O

SSTL

99

DQS7

I/O

SSTL

98

DQS7

I/O

SSTL

112

DM0

I

SSTL

Data Masks 7:0

Note: The data write masks, associated with one data byte. In Write

mode, DM operates as a byte mask by allowing input data to be

written if it is LOW but blocks the write operation if it is HIGH. In

Read mode, DM lines have no effect.

3.

×8 based module

120

DM1

I

SSTL

131

DM2

I

SSTL

36

DM3

I

SSTL

177

DM4

I

SSTL

79

DM5

I

SSTL

90

DM6

I

SSTL

206

DM7

I

SSTL

EEPROM

105

SCL

I

CMOS

Serial Bus Clock

Note: This signal is used to clock data into and out of the SPD EEPROM.

104

SDA

I/O

OD

Serial Bus Data

Note: This is a bidirectional pin used to transfer data into or out of the

SPD EEPROM. A resistor must be connected from SDA to

V

DDSPD

on the motherboard to act as a pull-up.

Ball No.

Name

Type

Buffer

Type

Function

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