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HYS64T256022EDL-3S-B Datasheet(PDF) 3 Page - Qimonda AG |
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HYS64T256022EDL-3S-B Datasheet(HTML) 3 Page - Qimonda AG |
3 / 40 page Internet Data Sheet Rev. 1.0, 2006-11 3 11172006-DXYK-2PPW HYS64T256022EDL–[25F/2.5/3/3S/3.7]–B Small Outline DDR2 SDRAM Modules 1Overview This chapter gives an overview of the 200-Pin Dual Die Small-Outline-DDR2-SDRAM Modules product family and describes its main characteristics. 1.1 Features • 200-Pin PC2-6400, PC2–5300 and PC2-4200 DDR2 SDRAM memory modules. • 256M × 64 module organization, and 2 × 128M × 8 chip organization • Standard Double-Data-Rate-Two Synchronous DRAMs (DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power supply • 2GB Modules built with stacked 1Gb DDR2 SDRAMs in PG-TFBGA-71 chipsize packages • All speed grades faster than DDR2-400 comply with DDR2-400 timing specifications. • Programmable CAS Latencies (3, 4, 5 and 6), Burst Length (8 & 4) and Burst Type • Burst Refresh, Distributed Refresh and Self Refresh • Programmable self refresh rate via EMRS2 setting • Programmable partial array refresh via EMRS2 settings • Average Refresh Period 7.8 µs at a T CASE lower than 85°C, 3.9 µs between 85°C and 95°C. • DCC enabling via EMRS2 setting • All inputs and outputs SSTL_18 compatible • Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT) • Serial Presence Detect with E2PROM • SO-DIMM Dimensions (nominal): 30 mm high, 67.6 mm wide • Based on Standard reference layouts Raw Card “D” • RoHS Compliant Products1) TABLE 1 Performance Table 1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers. Product Type Speed Code –25F –2.5 –3 –3S –3.7 Unit Speed Grade PC2–6400 5–5–5 PC2–6400 6–6–6 PC2–5300 4–4–4 PC2–5300 5–5–5 PC2–4200 4–4–4 — Max. Clock Frequency @CL6 f CK6 400 400 –– –MHz @CL5 f CK5 400 333 333 333 266 MHz @CL4 f CK4 266 266 333 266 266 MHz @CL3 f CK3 200 200 200 200 200 MHz Min. RAS-CAS-Delay t RCD 12.5 15 12 15 15 ns Min. Row Precharge Time t RP 12.5 15 12 15 15 ns Min. Row Active Time t RAS 45 45 45 45 45 ns Min. Row Cycle Time t RC 57.5 60 57 60 60 ns |
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