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GL830 Datasheet(PDF) 9 Page - GENESYS LOGIC |
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GL830 Datasheet(HTML) 9 Page - GENESYS LOGIC |
9 / 29 page GL830 USB2.0 to SATA Bridge Controller ©2007 Genesys Logic Inc. - All rights reserved. Page 9 CHAPTER 2 FEATURES · Complies with Universal Serial Bus specification rev. 2.0. · Complies with USB Storage Class specification ver.1.0. (Bulk only protocol) · Operating system supported: Win Vista/ Win XP / 2000 / Me / 98 / 98SE; Mac OS 9.X / X. · Integrated USB 2.0 Transceiver Macrocell Interface (UTMI) transceiver and Serial Interface Engine (SIE). · Support 4 endpoints: Control (0) / Bulk Read (1) / Bulk Write (2) / Interrupt (3). · 64 / 512 bytes Data Payload for full / high speed Bulk Endpoint. · Complies with Serial ATA specification rev. 2.6. · Support SATA hot-plug · Support Spread Spectrum Clocking to reduce EMI · Support Partial/Slumber power management · Provide adjustable TX signal amplitude and pre-emphasis level · Provide specified OOB signal detection and transmission · Embedded Turbo 8051. · ROM size: 12k words; RAM size: 1280 bytes. (Bulk Buffer: 512 words, MC RAM: 256 bytes) · Supports Power Down mode and USB suspend indicator. · Supports USB 2.0 TEST mode features. · Supports 4 PIO and 4GPIO for programmable AP. · Supports device power control for power on/off when running suspend mode. · Provides LED indicator for Full Speed and High Speed . · using 25 MHz external clock to provide better EMI. · 3.3V power input; 5V tolerance pad. · Supports Wakeup ability. · Embedded Regulator (3.3V to 1.8V). · Embedded Regulator (5V to 3.3V). · Provides SPI interface for Finger Print (only for 64 pin package). · Available in 48/64/128-pin LQFP. |
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