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M48T35AY-70PH1TR Datasheet(PDF) 10 Page - STMicroelectronics |
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M48T35AY-70PH1TR Datasheet(HTML) 10 Page - STMicroelectronics |
10 / 25 page M48T35AY, M48T35AV 10/25 Data Retention Mode With valid VCC applied, the M48T35AY/V operates as a conventional BYTEWIDE™ static RAM. Should the supply voltage decay, the RAM will au- tomatically power-fail deselect, write protecting it- self when VCC falls within the VPFD (max), VPFD (min) window (see Figure 15, Table 10, and Table 11., page 18). All outputs become high imped- ance, and all inputs are treated as “don't care.” Note: A power failure during a WRITE cycle may corrupt data at the currently addressed location, but does not jeopardize the rest of the RAM's con- tent. At voltages below VPFD (min), the user can be assured the memory will be in a write protected state, provided the VCC fall time is not less than tF. The M48T35AY/V may respond to transient noise spikes on VCC that reach into the deselect window during the time the device is sampling VCC. There- fore, decoupling of the power supply lines is rec- ommended. When VCC drops below VSO, the control circuit switches power to the internal battery which pre- serves data and powers the clock. The internal button cell will maintain data in the M48T35AY/V for an accumulated period of at least 7 years when VCC is less than VSO. As system power returns and VCC rises above VSO, the battery is discon- nected and the power supply is switched to exter- nal VCC. Write protection continues until VCC reaches VPFD (min) plus trec (min). E should be kept high as VCC rises past VPFD (min) to prevent inadvertent WRITE cycles prior to processor stabi- lization. Normal RAM operation can resume trec af- ter VCC exceeds VPFD (max). Also, as VCC rises, the battery voltage is checked. If the voltage is less than approximately 2.5V, an internal Battery Not OK (BOK) flag will be set. The BOK flag can be checked after power up. If the BOK flag is set, the first WRITE attempted will be blocked. The flag is automatically cleared after the first WRITE, and normal RAM operation resumes. Figure 10 illustrates how a BOK check routine could be structured. For more information on Battery Storage Life refer to the Application Note AN1012. Figure 10. Checking the BOK Flag Status READ DATA AT ANY ADDRESS AI00607 IS DATA COMPLEMENT OF FIRST READ? (BATTERY OK) POWER-UP YES NO WRITE DATA COMPLEMENT BACK TO SAME ADDRESS READ DATA AT SAME ADDRESS AGAIN NOTIFY SYSTEM OF LOW BATTERY (DATA MAY BE CORRUPTED) WRITE ORIGINAL DATA BACK TO SAME ADDRESS (BATTERY LOW) CONTINUE |
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