W83303AD/W83303AG

- 4 -

Pin Descriptions, continued

NO

NAME

I/O

FUNCTION DESCRIPTION

26

1.2V_SEN

I

27

1.2V_DRV

O

28

5VSB

P

Power Pin

29

C1

I

30

C2

I

31

CHRPMP

P

Charge pump pins. It supports 10mA driving current and insures output

voltage 9V or above.

32

AGND

P

Power pin

33

VPCI_DRV

O

34

VPCI_SEN

I

1.5V Voltage Regulator for PCI Express. If this power plane won’t be

used, the VPCI_SEN must be connected to 3VDUAL to avoid the fault

trigger of LUV event.

35

VCC

P

Power pin

36

LR1_DRV

O

37

LR1_SEN

I

38

LR2_DRV

O

39

LR2_SEN

I

Linear Regulators ranging form 1.2V to 5V and can be adjusted by

external resistors

40

DDRDET#

I

A signal to indicate type of DDRRAM that plugged- in; low means 2.6V for

DDR and high means 1.8V for DDRII.

41

FAULT#

I

Fault event be monitored; the chip shut the ATX power supply down

directly by control the PS_ON# signal as long as the fault events are

triggered.

42

PS_IN#

Power on signal. Low active.

43

PW_BUT#

I

System PW_BUT for power sequence monitoring.

44

PS_OUT#

O

Pin to control ATX power supply.

45

DGND

P

Power ground.

46

PWR_OK

I

Power good input signal of ATX power supply.

47

A0

I

I2C address selecting pin.

48

D5VSB

P

Power pin.

*VRGOOD & TYPEDET# can endure 0-12V level voltage.